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Searched refs:dd (Results 1 – 9 of 9) sorted by relevance

/art/test/003-omnibus-opcodes/src/
DFloatMath.java303 static void jlmTests(float ff, double dd) { in jlmTests() argument
311 Main.assertTrue(approxEqual(Math.abs(dd), dd, 0.001)); in jlmTests() local
312 Main.assertTrue(approxEqual(Math.abs(-dd), dd, 0.001)); in jlmTests()
313 Main.assertTrue(approxEqual(Math.min(dd, -5.0), -5.0, 0.001)); in jlmTests()
314 Main.assertTrue(approxEqual(Math.max(dd, -5.0), dd, 0.001)); in jlmTests() local
316 double sq = Math.sqrt(dd); in jlmTests()
317 Main.assertTrue(approxEqual(sq*sq, dd, 0.001)); in jlmTests()
/art/compiler/utils/arm/
Dassembler_arm32.h142 void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
146 bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE;
150 void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
151 void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
154 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
156 void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
158 void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
160 void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
162 void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
164 void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
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Dassembler_arm32.cc284 void Arm32Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) { in vmovd() argument
285 EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm); in vmovd()
304 bool Arm32Assembler::vmovd(DRegister dd, double d_imm, Condition cond) { in vmovd() argument
312 dd, D0, D0); in vmovd()
325 void Arm32Assembler::vaddd(DRegister dd, DRegister dn, DRegister dm, in vaddd() argument
327 EmitVFPddd(cond, B21 | B20, dd, dn, dm); in vaddd()
337 void Arm32Assembler::vsubd(DRegister dd, DRegister dn, DRegister dm, in vsubd() argument
339 EmitVFPddd(cond, B21 | B20 | B6, dd, dn, dm); in vsubd()
349 void Arm32Assembler::vmuld(DRegister dd, DRegister dn, DRegister dm, in vmuld() argument
351 EmitVFPddd(cond, B21, dd, dn, dm); in vmuld()
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Dassembler_thumb2.h171 void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
175 bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE;
179 void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
180 void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
183 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
185 void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
187 void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
189 void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
191 void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
193 void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
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Dassembler_thumb2.cc379 bool Thumb2Assembler::vmovd(DRegister dd, double d_imm, Condition cond) { in vmovd() argument
387 dd, D0, D0); in vmovd()
399 void Thumb2Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) { in vmovd() argument
400 EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm); in vmovd()
410 void Thumb2Assembler::vaddd(DRegister dd, DRegister dn, DRegister dm, in vaddd() argument
412 EmitVFPddd(cond, B21 | B20, dd, dn, dm); in vaddd()
422 void Thumb2Assembler::vsubd(DRegister dd, DRegister dn, DRegister dm, in vsubd() argument
424 EmitVFPddd(cond, B21 | B20 | B6, dd, dn, dm); in vsubd()
434 void Thumb2Assembler::vmuld(DRegister dd, DRegister dn, DRegister dm, in vmuld() argument
436 EmitVFPddd(cond, B21, dd, dn, dm); in vmuld()
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Dassembler_arm.h467 virtual void vmovd(DRegister dd, DRegister dm, Condition cond = AL) = 0;
471 virtual bool vmovd(DRegister dd, double d_imm, Condition cond = AL) = 0;
475 virtual void vldrd(DRegister dd, const Address& ad, Condition cond = AL) = 0;
476 virtual void vstrd(DRegister dd, const Address& ad, Condition cond = AL) = 0;
479 virtual void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
481 virtual void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
483 virtual void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
485 virtual void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
487 virtual void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
489 virtual void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
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/art/test/005-annotations/src/android/test/anno/
DAnnoArrayField.java17 double[] dd() default {0.987654321}; in dd() method
DTestAnnotations.java96 dd = {0.3,0.6,0.9},
/art/test/005-annotations/
Dexpected.txt2 …estAnnotations.thing1: @android.test.anno.AnnoArrayField(bb=[], cc=[a, b], dd=[0.987654321], ff=[3…
3 …notations.thing2: @android.test.anno.AnnoArrayField(bb=[-1, 0, 1], cc=[Q], dd=[0.3, 0.6, 0.9], ff=…