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/art/compiler/dex/quick/
Dralloc_util.cc32 for (RegisterInfo* info = iter.Next(); info != NULL; info = iter.Next()) { in ResetRegPool() local
33 info->MarkFree(); in ResetRegPool()
86 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg)); in RegisterPool() local
87 m2l_->reginfo_map_.Put(reg.GetReg(), info); in RegisterPool()
88 core_regs_.Insert(info); in RegisterPool()
91 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg)); in RegisterPool() local
92 m2l_->reginfo_map_.Put(reg.GetReg(), info); in RegisterPool()
93 core64_regs_.Insert(info); in RegisterPool()
96 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg)); in RegisterPool() local
97 m2l_->reginfo_map_.Put(reg.GetReg(), info); in RegisterPool()
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Dgen_invoke.cc45 void Mir2Lir::AddIntrinsicSlowPath(CallInfo* info, LIR* branch, LIR* resume) { in AddIntrinsicSlowPath() argument
48 IntrinsicSlowPathPath(Mir2Lir* m2l, CallInfo* info, LIR* branch, LIR* resume = nullptr) in AddIntrinsicSlowPath() argument
49 : LIRSlowPath(m2l, info->offset, branch, resume), info_(info) { in AddIntrinsicSlowPath()
67 AddSlowPath(new (arena_) IntrinsicSlowPathPath(this, info, branch, resume)); in AddIntrinsicSlowPath()
462 static void CommonCallCodeLoadThisIntoArg1(const CallInfo* info, Mir2Lir* cg) { in CommonCallCodeLoadThisIntoArg1() argument
463 RegLocation rl_arg = info->args[0]; in CommonCallCodeLoadThisIntoArg1()
467 static void CommonCallCodeLoadClassIntoArg0(const CallInfo* info, Mir2Lir* cg) { in CommonCallCodeLoadClassIntoArg0() argument
468 cg->GenNullCheck(cg->TargetReg(kArg1, kRef), info->opt_flags); in CommonCallCodeLoadClassIntoArg0()
473 cg->MarkPossibleNullPointerException(info->opt_flags); in CommonCallCodeLoadClassIntoArg0()
476 static bool CommonCallCodeLoadCodePointerIntoInvokeTgt(const CallInfo* info, in CommonCallCodeLoadCodePointerIntoInvokeTgt() argument
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Ddex_file_method_inliner.cc423 bool DexFileMethodInliner::GenIntrinsic(Mir2Lir* backend, CallInfo* info) { in GenIntrinsic() argument
427 auto it = inline_methods_.find(info->index); in GenIntrinsic()
433 if (kIntrinsicIsStatic[intrinsic.opcode] != (info->type == kStatic)) { in GenIntrinsic()
439 return backend->GenInlinedDoubleCvt(info); in GenIntrinsic()
441 return backend->GenInlinedFloatCvt(info); in GenIntrinsic()
443 return backend->GenInlinedReverseBytes(info, static_cast<OpSize>(intrinsic.d.data)); in GenIntrinsic()
445 return backend->GenInlinedReverseBits(info, static_cast<OpSize>(intrinsic.d.data)); in GenIntrinsic()
447 return backend->GenInlinedAbsInt(info); in GenIntrinsic()
449 return backend->GenInlinedAbsLong(info); in GenIntrinsic()
451 return backend->GenInlinedAbsFloat(info); in GenIntrinsic()
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Dmir_to_lir.h681 LIR* NewLIR2NoDest(int opcode, int src, int info);
683 LIR* NewLIR4(int opcode, int dest, int src1, int src2, int info);
714 virtual void BeginInvoke(CallInfo* info) {} in BeginInvoke() argument
715 virtual void EndInvoke(CallInfo* info) {} in EndInvoke() argument
732 void CompilerInitPool(RegisterInfo* info, RegStorage* regs, int num);
740 void ClobberAliases(RegisterInfo* info, uint32_t clobber_mask);
775 void FlushSpecificReg(RegisterInfo* info);
820 void AddIntrinsicSlowPath(CallInfo* info, LIR* branch, LIR* resume = nullptr);
850 void GenFilledNewArray(CallInfo* info);
927 void GenInvoke(CallInfo* info);
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/art/runtime/gc/space/
Dlarge_object_space.cc262 size_t FreeListSpace::GetSlotIndexForAllocationInfo(const AllocationInfo* info) const { in GetSlotIndexForAllocationInfo()
263 DCHECK_GE(info, allocation_info_); in GetSlotIndexForAllocationInfo()
264 DCHECK_LT(info, reinterpret_cast<AllocationInfo*>(allocation_info_map_->End())); in GetSlotIndexForAllocationInfo()
265 return info - allocation_info_; in GetSlotIndexForAllocationInfo()
331 void FreeListSpace::RemoveFreePrev(AllocationInfo* info) { in RemoveFreePrev() argument
332 CHECK_GT(info->GetPrevFree(), 0U); in RemoveFreePrev()
333 auto it = free_blocks_.lower_bound(info); in RemoveFreePrev()
335 CHECK_EQ(*it, info); in RemoveFreePrev()
344 AllocationInfo* info = GetAllocationInfoForAddress(reinterpret_cast<uintptr_t>(obj)); in Free() local
345 DCHECK(!info->IsFree()); in Free()
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/art/compiler/dex/quick/arm64/
Dfp_arm64.cc344 bool Arm64Mir2Lir::GenInlinedAbsFloat(CallInfo* info) { in GenInlinedAbsFloat() argument
345 if (info->result.location == kLocInvalid) { in GenInlinedAbsFloat()
348 RegLocation rl_dest = info->result; in GenInlinedAbsFloat()
349 RegLocation rl_src = UpdateLoc(info->args[0]); in GenInlinedAbsFloat()
362 bool Arm64Mir2Lir::GenInlinedAbsDouble(CallInfo* info) { in GenInlinedAbsDouble() argument
363 if (info->result.location == kLocInvalid) { in GenInlinedAbsDouble()
366 RegLocation rl_dest = info->result; in GenInlinedAbsDouble()
367 RegLocation rl_src = UpdateLocWide(info->args[0]); in GenInlinedAbsDouble()
380 bool Arm64Mir2Lir::GenInlinedSqrt(CallInfo* info) { in GenInlinedSqrt() argument
381 RegLocation rl_src = info->args[0]; in GenInlinedSqrt()
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Dtarget_arm64.cc605 for (RegisterInfo* info = fp_it.Next(); info != nullptr; info = fp_it.Next()) { in CompilerInitializeRegAlloc() local
606 int fp_reg_num = info->GetReg().GetRegNum(); in CompilerInitializeRegAlloc()
612 info->SetMaster(dp_reg_info); in CompilerInitializeRegAlloc()
614 DCHECK_EQ(info->StorageMask(), 0x1U); in CompilerInitializeRegAlloc()
619 for (RegisterInfo* info = w_it.Next(); info != nullptr; info = w_it.Next()) { in CompilerInitializeRegAlloc() local
620 int x_reg_num = info->GetReg().GetRegNum(); in CompilerInitializeRegAlloc()
626 info->SetMaster(x_reg_info); in CompilerInitializeRegAlloc()
628 DCHECK_EQ(info->StorageMask(), 0x1U); in CompilerInitializeRegAlloc()
1005 int Arm64Mir2Lir::GenDalvikArgsNoRange(CallInfo* info, in GenDalvikArgsNoRange() argument
1010 return GenDalvikArgsRange(info, in GenDalvikArgsNoRange()
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Dcodegen_arm64.h157 bool GenInlinedReverseBits(CallInfo* info, OpSize size) OVERRIDE;
158 bool GenInlinedAbsFloat(CallInfo* info) OVERRIDE;
159 bool GenInlinedAbsDouble(CallInfo* info) OVERRIDE;
160 bool GenInlinedCas(CallInfo* info, bool is_long, bool is_object) OVERRIDE;
161 bool GenInlinedMinMax(CallInfo* info, bool is_min, bool is_long) OVERRIDE;
162 bool GenInlinedMinMaxFP(CallInfo* info, bool is_min, bool is_double) OVERRIDE;
163 bool GenInlinedSqrt(CallInfo* info) OVERRIDE;
164 bool GenInlinedCeil(CallInfo* info) OVERRIDE;
165 bool GenInlinedFloor(CallInfo* info) OVERRIDE;
166 bool GenInlinedRint(CallInfo* info) OVERRIDE;
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Dint_arm64.cc644 bool Arm64Mir2Lir::GenInlinedAbsLong(CallInfo* info) { in GenInlinedAbsLong() argument
645 RegLocation rl_src = info->args[0]; in GenInlinedAbsLong()
647 RegLocation rl_dest = InlineTargetWide(info); in GenInlinedAbsLong()
658 bool Arm64Mir2Lir::GenInlinedMinMax(CallInfo* info, bool is_min, bool is_long) { in GenInlinedMinMax() argument
660 RegLocation rl_src1 = info->args[0]; in GenInlinedMinMax()
661 RegLocation rl_src2 = (is_long) ? info->args[2] : info->args[1]; in GenInlinedMinMax()
664 RegLocation rl_dest = (is_long) ? InlineTargetWide(info) : InlineTarget(info); in GenInlinedMinMax()
673 bool Arm64Mir2Lir::GenInlinedPeek(CallInfo* info, OpSize size) { in GenInlinedPeek() argument
674 RegLocation rl_src_address = info->args[0]; // long address in GenInlinedPeek()
675 RegLocation rl_dest = (size == k64) ? InlineTargetWide(info) : InlineTarget(info); in GenInlinedPeek()
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/art/runtime/arch/mips/
Dfault_handler_mips.cc32 void FaultManager::HandleNestedSignal(int sig, siginfo_t* info, void* context) { in HandleNestedSignal() argument
40 bool NullPointerHandler::Action(int sig, siginfo_t* info, void* context) { in Action() argument
44 bool SuspensionHandler::Action(int sig, siginfo_t* info, void* context) { in Action() argument
48 bool StackOverflowHandler::Action(int sig, siginfo_t* info, void* context) { in Action() argument
/art/runtime/
Druntime_android.cc34 void HandleUnexpectedSignal(int signal_number, siginfo_t* info, void* raw_context) { in HandleUnexpectedSignal() argument
50 if (kDumpHeapObjectOnSigsevg && heap != nullptr && info != nullptr) { in HandleUnexpectedSignal()
52 heap->DumpObject(LOG(INTERNAL_FATAL), reinterpret_cast<mirror::Object*>(info->si_addr)); in HandleUnexpectedSignal()
56 old_action.sa_sigaction(signal_number, info, raw_context); in HandleUnexpectedSignal()
Dfault_handler.cc81 static void art_fault_handler(int sig, siginfo_t* info, void* context) { in art_fault_handler() argument
82 fault_manager.HandleFault(sig, info, context); in art_fault_handler()
86 static void art_nested_signal_handler(int sig, siginfo_t* info, void* context) { in art_nested_signal_handler() argument
87 fault_manager.HandleNestedSignal(sig, info, context); in art_nested_signal_handler()
138 void FaultManager::HandleFault(int sig, siginfo_t* info, void* context) { in HandleFault() argument
144 if (IsInGeneratedCode(info, context, true)) { in HandleFault()
148 if (handler->Action(sig, info, context)) { in HandleFault()
167 if (handler->Action(sig, info, context)) { in HandleFault()
176 InvokeUserSignalHandler(sig, info, context); in HandleFault()
Druntime_linux.cc42 utsname info; in Dump() local
43 uname(&info); in Dump()
46 os << info.sysname << " " << info.release << " (" << info.machine << ")"; in Dump()
274 void HandleUnexpectedSignal(int signal_number, siginfo_t* info, void* raw_context) { in HandleUnexpectedSignal() argument
302 info->si_code, in HandleUnexpectedSignal()
303 GetSignalCodeName(signal_number, info->si_code)) in HandleUnexpectedSignal()
304 << (has_address ? StringPrintf(" fault addr %p", info->si_addr) : "") << "\n" in HandleUnexpectedSignal()
314 if (kDumpHeapObjectOnSigsevg && heap != nullptr && info != nullptr) { in HandleUnexpectedSignal()
316 heap->DumpObject(LOG(INTERNAL_FATAL), reinterpret_cast<mirror::Object*>(info->si_addr)); in HandleUnexpectedSignal()
Dprofiler.cc762 std::vector<std::string> info; in ReadPrevious() local
763 Split(line, '/', info); in ReadPrevious()
764 if (info.size() != 3 && info.size() != 4) { in ReadPrevious()
768 std::string methodname = info[0]; in ReadPrevious()
769 uint32_t total_count = strtoul(info[1].c_str(), nullptr, 10); in ReadPrevious()
770 uint32_t size = strtoul(info[2].c_str(), nullptr, 10); in ReadPrevious()
772 if (type == kProfilerBoundedStack && info.size() == 4) { in ReadPrevious()
774 std::string context_counts_str = info[3].substr(1, info[3].size() - 2); in ReadPrevious()
842 std::vector<std::string> info; in LoadFile() local
843 Split(line, '/', info); in LoadFile()
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/art/build/
DAndroid.common_build.mk37 $(info Disabling ART_BUILD_TARGET_NDEBUG)
40 $(info Disabling ART_BUILD_TARGET_DEBUG)
43 $(info Disabling ART_BUILD_HOST_NDEBUG)
46 $(info Disabling ART_BUILD_HOST_DEBUG)
54 $(info Enabling ART_SMALL_MODE because of existence of art/SMALL_ART)
66 $(info Enabling ART_SEA_IR_MODE because of existence of art/SEA_IR_ART)
78 $(info Enabling ART_USE_PORTABLE_COMPILER because of existence of art/USE_PORTABLE_COMPILER)
82 $(info Enabling ART_USE_PORTABLE_COMPILER because WITH_ART_USE_PORTABLE_COMPILER=true)
91 $(info Enabling ART_USE_OPTIMIZING_COMPILER because of existence of art/USE_OPTIMIZING_COMPILER)
271 $(info Using target GCC $(TARGET_GCC_VERSION) disables thread-safety checks.)
/art/compiler/dex/quick/arm/
Dfp_arm.cc142 RegisterInfo* info = GetRegInfo(rl_src.reg); in GenConversion() local
143 RegStorage src_low = info->FindMatchingView(RegisterInfo::kLowSingleStorageMask)->GetReg(); in GenConversion()
145 RegStorage src_high = info->FindMatchingView(RegisterInfo::kHighSingleStorageMask)->GetReg(); in GenConversion()
165 RegisterInfo* info = GetRegInfo(rl_src.reg); in GenConversion() local
166 RegStorage src_low = info->FindMatchingView(RegisterInfo::kLowSingleStorageMask)->GetReg(); in GenConversion()
168 RegStorage src_high = info->FindMatchingView(RegisterInfo::kHighSingleStorageMask)->GetReg(); in GenConversion()
357 bool ArmMir2Lir::GenInlinedAbsFloat(CallInfo* info) { in GenInlinedAbsFloat() argument
358 if (info->result.location == kLocInvalid) { in GenInlinedAbsFloat()
361 RegLocation rl_dest = info->result; in GenInlinedAbsFloat()
362 RegLocation rl_src = UpdateLoc(info->args[0]); in GenInlinedAbsFloat()
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Dtarget_arm.cc579 for (RegisterInfo* info = it.Next(); info != nullptr; info = it.Next()) { in CompilerInitializeRegAlloc() local
580 int sp_reg_num = info->GetReg().GetRegNum(); in CompilerInitializeRegAlloc()
587 info->SetMaster(dp_reg_info); in CompilerInitializeRegAlloc()
589 DCHECK_EQ(info->StorageMask(), RegisterInfo::kLowSingleStorageMask); in CompilerInitializeRegAlloc()
592 info->SetStorageMask(RegisterInfo::kHighSingleStorageMask); in CompilerInitializeRegAlloc()
787 for (RegisterInfo* info = it.Next(); info != nullptr; info = it.Next()) { in AllocPreservedDouble() local
788 if (!info->IsTemp() && !info->InUse()) { in AllocPreservedDouble()
789 res = info->GetReg(); in AllocPreservedDouble()
790 info->MarkInUse(); in AllocPreservedDouble()
791 MarkPreservedDouble(v_reg, info->GetReg()); in AllocPreservedDouble()
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Dcodegen_arm.h104 bool GenInlinedAbsFloat(CallInfo* info) OVERRIDE;
105 bool GenInlinedAbsDouble(CallInfo* info) OVERRIDE;
106 bool GenInlinedCas(CallInfo* info, bool is_long, bool is_object);
107 bool GenInlinedMinMax(CallInfo* info, bool is_min, bool is_long);
108 bool GenInlinedSqrt(CallInfo* info);
109 bool GenInlinedPeek(CallInfo* info, OpSize size);
110 bool GenInlinedPoke(CallInfo* info, OpSize size);
111 bool GenInlinedArrayCopyCharArray(CallInfo* info) OVERRIDE;
/art/compiler/llvm/
Dintrinsic_helper.cc106 const IntrinsicInfo& info = Info[i]; in IntrinsicHelper() local
113 IntrinsicValType type = info.arg_type_[arg_iter]; in IntrinsicHelper()
128 GetLLVMTypeOfIntrinsicValType(irb, info.ret_val_type_); in IntrinsicHelper()
138 info.name_, &module); in IntrinsicHelper()
140 if (info.attr_ & kAttrReadOnly) { in IntrinsicHelper()
143 if (info.attr_ & kAttrReadNone) { in IntrinsicHelper()
/art/compiler/dex/quick/x86/
Dtarget_x86.cc629 RegisterInfo* info = new (arena_) RegisterInfo(reg, GetRegMaskCommon(reg)); in CompilerInitializeRegAlloc() local
630 reginfo_map_.Put(reg.GetReg(), info); in CompilerInitializeRegAlloc()
641 for (RegisterInfo* info = it.Next(); info != nullptr; info = it.Next()) { in CompilerInitializeRegAlloc() local
642 int sp_reg_num = info->GetReg().GetRegNum(); in CompilerInitializeRegAlloc()
649 info->SetMaster(xp_reg_info); in CompilerInitializeRegAlloc()
656 DCHECK_EQ(info->StorageMask(), 0x1U); in CompilerInitializeRegAlloc()
662 for (RegisterInfo* info = w_it.Next(); info != nullptr; info = w_it.Next()) { in CompilerInitializeRegAlloc() local
663 int x_reg_num = info->GetReg().GetRegNum(); in CompilerInitializeRegAlloc()
669 info->SetMaster(x_reg_info); in CompilerInitializeRegAlloc()
671 DCHECK_EQ(info->StorageMask(), 0x1U); in CompilerInitializeRegAlloc()
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Dfp_x86.cc586 bool X86Mir2Lir::GenInlinedSqrt(CallInfo* info) { in GenInlinedSqrt() argument
587 RegLocation rl_src = info->args[0]; in GenInlinedSqrt()
588 RegLocation rl_dest = InlineTargetWide(info); // double place for result in GenInlinedSqrt()
596 bool X86Mir2Lir::GenInlinedAbsFloat(CallInfo* info) { in GenInlinedAbsFloat() argument
598 RegLocation rl_src = info->args[0]; in GenInlinedAbsFloat()
601 RegLocation rl_dest = InlineTarget(info); in GenInlinedAbsFloat()
643 bool X86Mir2Lir::GenInlinedAbsDouble(CallInfo* info) { in GenInlinedAbsDouble() argument
644 RegLocation rl_src = info->args[0]; in GenInlinedAbsDouble()
645 RegLocation rl_dest = InlineTargetWide(info); in GenInlinedAbsDouble()
708 bool X86Mir2Lir::GenInlinedMinMaxFP(CallInfo* info, bool is_min, bool is_double) { in GenInlinedMinMaxFP() argument
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/art/compiler/optimizing/
Dnodes.cc150 HLoopInformation* info = successor->GetLoopInformation(); in SplitCriticalEdge() local
151 if (info->IsBackEdge(block)) { in SplitCriticalEdge()
152 info->RemoveBackEdge(block); in SplitCriticalEdge()
153 info->AddBackEdge(new_block); in SplitCriticalEdge()
159 HLoopInformation* info = header->GetLoopInformation(); in SimplifyLoop() local
164 if (info->NumberOfBackEdges() > 1) { in SimplifyLoop()
168 for (size_t pred = 0, e = info->GetBackEdges().Size(); pred < e; ++pred) { in SimplifyLoop()
169 HBasicBlock* back_edge = info->GetBackEdges().Get(pred); in SimplifyLoop()
172 info->ClearBackEdges(); in SimplifyLoop()
173 info->AddBackEdge(new_back_edge); in SimplifyLoop()
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/art/runtime/arch/arm64/
Dfault_handler_arm64.cc40 void FaultManager::HandleNestedSignal(int sig, siginfo_t* info, void* context) { in HandleNestedSignal() argument
85 bool NullPointerHandler::Action(int sig, siginfo_t* info, void* context) { in Action() argument
108 bool SuspensionHandler::Action(int sig, siginfo_t* info, void* context) { in Action() argument
158 bool StackOverflowHandler::Action(int sig, siginfo_t* info, void* context) { in Action() argument
/art/runtime/arch/arm/
Dfault_handler_arm.cc50 void FaultManager::HandleNestedSignal(int sig, siginfo_t* info, void* context) { in HandleNestedSignal() argument
103 bool NullPointerHandler::Action(int sig, siginfo_t* info, void* context) { in Action() argument
130 bool SuspensionHandler::Action(int sig, siginfo_t* info, void* context) { in Action() argument
199 bool StackOverflowHandler::Action(int sig, siginfo_t* info, void* context) { in Action() argument
/art/compiler/dex/quick/mips/
Dcodegen_mips.h102 bool GenInlinedAbsFloat(CallInfo* info) OVERRIDE;
103 bool GenInlinedAbsDouble(CallInfo* info) OVERRIDE;
104 bool GenInlinedCas(CallInfo* info, bool is_long, bool is_object);
105 bool GenInlinedMinMax(CallInfo* info, bool is_min, bool is_long);
106 bool GenInlinedSqrt(CallInfo* info);
107 bool GenInlinedPeek(CallInfo* info, OpSize size);
108 bool GenInlinedPoke(CallInfo* info, OpSize size);

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