| /external/llvm/lib/CodeGen/ |
| D | CodeGenPrepare.cpp | 1039 struct ExtAddrMode : public TargetLowering::AddrMode {
1511 ExtAddrMode &AddrMode; member in __anon5ed5c77e0311::AddressingModeMatcher
1531 : AddrModeInsts(AMI), TLI(T), AccessTy(AT), MemoryInst(MI), AddrMode(AM), in AddressingModeMatcher()
1589 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg) in MatchScaledValue()
1592 ExtAddrMode TestAddrMode = AddrMode; in MatchScaledValue()
1604 AddrMode = TestAddrMode; in MatchScaledValue()
1619 AddrMode = TestAddrMode; in MatchScaledValue()
2003 ExtAddrMode BackupAddrMode = AddrMode; in MatchOperationAddr()
2017 AddrMode = BackupAddrMode; in MatchOperationAddr()
2027 AddrMode = BackupAddrMode; in MatchOperationAddr()
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| D | BasicTargetTransformInfo.cpp | 151 TargetLoweringBase::AddrMode AM; in isLegalAddressingMode()
162 TargetLoweringBase::AddrMode AM; in getScalingFactorCost()
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 442 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local
447 AddrMode = ARMII::AddrModeT2_i12; // FIXME. mode for thumb2? in rewriteT2FrameIndex()
517 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in rewriteT2FrameIndex()
523 if (AddrMode == ARMII::AddrModeT2_so) { in rewriteT2FrameIndex()
533 AddrMode = ARMII::AddrModeT2_i12; in rewriteT2FrameIndex()
538 if (AddrMode == ARMII::AddrModeT2_i8 || AddrMode == ARMII::AddrModeT2_i12) { in rewriteT2FrameIndex()
552 } else if (AddrMode == ARMII::AddrMode5) { in rewriteT2FrameIndex()
566 } else if (AddrMode == ARMII::AddrModeT2_i8s4) { in rewriteT2FrameIndex()
592 if (AddrMode == ARMII::AddrMode5) in rewriteT2FrameIndex()
606 if (AddrMode == ARMII::AddrMode5) in rewriteT2FrameIndex()
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| D | ARMInstrFormats.td | 90 class AddrMode<bits<5> val> {
93 def AddrModeNone : AddrMode<0>;
94 def AddrMode1 : AddrMode<1>;
95 def AddrMode2 : AddrMode<2>;
96 def AddrMode3 : AddrMode<3>;
97 def AddrMode4 : AddrMode<4>;
98 def AddrMode5 : AddrMode<5>;
99 def AddrMode6 : AddrMode<6>;
100 def AddrModeT1_1 : AddrMode<7>;
101 def AddrModeT1_2 : AddrMode<8>;
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| D | ARMBaseRegisterInfo.cpp | 446 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
450 switch (AddrMode) { in getFrameIndexInstrOffset()
636 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
645 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in isFrameOffsetLegal()
651 switch (AddrMode) { in isFrameOffsetLegal()
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| D | ARMInstrNEON.td | 663 class VLD1D<bits<4> op7_4, string Dt, Operand AddrMode>
665 (ins AddrMode:$Rn), IIC_VLD1,
671 class VLD1Q<bits<4> op7_4, string Dt, Operand AddrMode>
673 (ins AddrMode:$Rn), IIC_VLD1x2,
691 multiclass VLD1DWB<bits<4> op7_4, string Dt, Operand AddrMode> {
693 (ins AddrMode:$Rn), IIC_VLD1u,
701 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1u,
708 multiclass VLD1QWB<bits<4> op7_4, string Dt, Operand AddrMode> {
710 (ins AddrMode:$Rn), IIC_VLD1x2u,
718 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1x2u,
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| D | ARMISelLowering.h | 289 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
290 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
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| D | Thumb1RegisterInfo.cpp | 353 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex() local
437 if (AddrMode != ARMII::AddrModeT1_s) in rewriteFrameIndex()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 235 enum AddrMode { enum
255 inline static const char *AddrModeToString(AddrMode addrmode) { in AddrModeToString()
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonBaseInfo.h | 62 enum AddrMode { enum
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| /external/vixl/src/a64/ |
| D | simulator-a64.h | 487 AddrMode addrmode);
488 void LoadStorePairHelper(Instruction* instr, AddrMode addrmode);
491 AddrMode addrmode);
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| D | instructions-a64.h | 129 enum AddrMode { enum
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| D | assembler-a64.h | 539 AddrMode addrmode = Offset);
550 AddrMode addrmode = Offset);
555 AddrMode addrmode() const { return addrmode_; } in addrmode()
568 AddrMode addrmode_;
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| /external/chromium_org/v8/src/arm/ |
| D | assembler-arm.h | 559 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset);
564 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset);
570 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
573 AddrMode am = Offset)) {
590 AddrMode am() const { return am_; } in am()
602 AddrMode am_; // bits P, U, and W
614 explicit NeonMemOperand(Register rn, AddrMode am = Offset, int align = 0);
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| D | constants-arm.h | 260 enum AddrMode { enum
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| /external/chromium_org/v8/src/arm64/ |
| D | simulator-arm64.h | 589 AddrMode addrmode);
590 void LoadStorePairHelper(Instruction* instr, AddrMode addrmode);
593 AddrMode addrmode);
596 AddrMode addrmode);
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| D | instructions-arm64.h | 72 enum AddrMode { enum
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| D | assembler-arm64.h | 703 AddrMode addrmode = Offset);
714 AddrMode addrmode = Offset);
719 AddrMode addrmode() const { return addrmode_; } in addrmode()
736 AddrMode addrmode_;
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 166 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 295 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
302 int getScalingFactorCost(const AddrMode &AM, Type *Ty) const override;
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.h | 123 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.h | 200 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 210 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 663 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
682 int getScalingFactorCost(const AddrMode &AM, Type *Ty) const override;
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1249 struct AddrMode { struct
1254 AddrMode() : BaseGV(nullptr), BaseOffs(0), HasBaseReg(false), Scale(0) {} in AddrMode() argument
1263 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const;
1271 virtual int getScalingFactorCost(const AddrMode &AM, Type *Ty) const { in getScalingFactorCost()
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