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Searched refs:MCSchedClassDesc (Results 1 – 13 of 13) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DTargetSchedule.h55 const MCSchedClassDesc *resolveSchedClass(const MachineInstr *MI) const;
89 const MCSchedClassDesc *SC = nullptr) const;
113 ProcResIter getWriteProcResBegin(const MCSchedClassDesc *SC) const { in getWriteProcResBegin()
117 ProcResIter getWriteProcResEnd(const MCSchedClassDesc *SC) const { in getWriteProcResEnd()
DScheduleDAGInstrs.h174 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass()
DMachineTraceMetrics.h268 ArrayRef<const MCSchedClassDesc*> ExtraInstrs = None) const;
DScheduleDAG.h33 struct MCSchedClassDesc;
266 const MCSchedClassDesc *SchedClass; // NULL or resolved SchedClass.
/external/llvm/include/llvm/MC/
DMCSubtargetInfo.h94 const MCSchedClassDesc *SC) const { in getWriteProcResBegin()
98 const MCSchedClassDesc *SC) const { in getWriteProcResEnd()
102 const MCWriteLatencyEntry *getWriteLatencyEntry(const MCSchedClassDesc *SC, in getWriteLatencyEntry()
110 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles()
DMCSchedule.h101 struct MCSchedClassDesc { struct
195 const MCSchedClassDesc *SchedClassTable;
223 const MCSchedClassDesc *sc, unsigned npr, unsigned nsc, in MCSchedModel()
251 const MCSchedClassDesc *getSchedClassDesc(unsigned SchedClassIdx) const { in getSchedClassDesc()
/external/llvm/lib/CodeGen/
DTargetSchedule.cpp78 const MCSchedClassDesc *SC) const { in getNumMicroOps()
102 const MCSchedClassDesc *TargetSchedModel::
107 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
188 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOperandLatency()
200 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI); in computeOperandLatency()
238 const MCSchedClassDesc *SCDesc = resolveSchedClass(MI); in computeInstrLatency()
278 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOutputLatency()
DMachineTraceMetrics.cpp110 const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI); in getResources()
1200 ArrayRef<const MCSchedClassDesc*> ExtraInstrs) const { in getResourceLength()
1210 const MCSchedClassDesc* SC = ExtraInstrs[I]; in getResourceLength()
DMachineScheduler.cpp1604 const MCSchedClassDesc *SC = DAG->getSchedClass(&*I); in init()
1685 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in checkHazard()
1888 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in bumpNode()
2113 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in initResourceDelta()
DScheduleDAGInstrs.cpp712 const MCSchedClassDesc *SC = getSchedClass(SU); in initSUnits()
/external/llvm/utils/TableGen/
DSubtargetEmitter.cpp38 std::vector<std::vector<MCSchedClassDesc> > ProcSchedClasses;
836 std::vector<MCSchedClassDesc> &SCTab = SchedTables.ProcSchedClasses.back(); in GenSchedClassTables()
842 MCSchedClassDesc &SCDesc = SCTab.back(); in GenSchedClassTables()
868 SCDesc.NumMicroOps = MCSchedClassDesc::VariantNumMicroOps; in GenSchedClassTables()
951 SCDesc.NumMicroOps = MCSchedClassDesc::InvalidNumMicroOps; in GenSchedClassTables()
1001 SCDesc.NumMicroOps = MCSchedClassDesc::InvalidNumMicroOps; in GenSchedClassTables()
1023 if (SCDesc.NumMicroOps == MCSchedClassDesc::InvalidNumMicroOps) { in GenSchedClassTables()
1144 std::vector<MCSchedClassDesc> &SCTab = in EmitSchedClassTables()
1157 << MCSchedClassDesc::InvalidNumMicroOps in EmitSchedClassTables()
1161 MCSchedClassDesc &MCDesc = SCTab[SCIdx]; in EmitSchedClassTables()
/external/llvm/lib/Target/AArch64/
DAArch64StorePairSuppress.cpp83 const MCSchedClassDesc *SCDesc = in shouldAddSTPToBlock()
/external/llvm/lib/MC/MCDisassembler/
DDisassembler.cpp217 const MCSchedClassDesc *SCDesc = SCModel->getSchedClassDesc(SCClass); in getLatency()