| /external/llvm/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 1197 SmallVector<MachineInstr *, 2> NewMIs; in tryInstructionTransform() local
1200 NewMIs)) { in tryInstructionTransform()
1204 assert(NewMIs.size() == 2 && in tryInstructionTransform()
1207 NewMIs[1]->addRegisterKilled(Reg, TRI); in tryInstructionTransform()
1211 MBB->insert(mi, NewMIs[0]); in tryInstructionTransform()
1212 MBB->insert(mi, NewMIs[1]); in tryInstructionTransform()
1214 DEBUG(dbgs() << "2addr: NEW LOAD: " << *NewMIs[0] in tryInstructionTransform()
1215 << "2addr: NEW INST: " << *NewMIs[1]); in tryInstructionTransform()
1218 unsigned NewDstIdx = NewMIs[1]->findRegisterDefOperandIdx(regA); in tryInstructionTransform()
1219 unsigned NewSrcIdx = NewMIs[1]->findRegisterUseOperandIdx(regB); in tryInstructionTransform()
[all …]
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| D | MachineLICM.cpp | 1267 SmallVector<MachineInstr *, 2> NewMIs; in ExtractHoistableLoad() local
1271 NewMIs); in ExtractHoistableLoad()
1276 assert(NewMIs.size() == 2 && in ExtractHoistableLoad()
1280 MBB->insert(Pos, NewMIs[0]); in ExtractHoistableLoad()
1281 MBB->insert(Pos, NewMIs[1]); in ExtractHoistableLoad()
1284 if (!IsLoopInvariantInst(*NewMIs[0]) || !IsProfitableToHoist(*NewMIs[0])) { in ExtractHoistableLoad()
1285 NewMIs[0]->eraseFromParent(); in ExtractHoistableLoad()
1286 NewMIs[1]->eraseFromParent(); in ExtractHoistableLoad()
1291 UpdateRegPressure(NewMIs[1]); in ExtractHoistableLoad()
1295 return NewMIs[0]; in ExtractHoistableLoad()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 776 SmallVectorImpl<MachineInstr*> &NewMIs, in StoreRegToStackSlot() argument
784 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) in StoreRegToStackSlot()
790 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) in StoreRegToStackSlot()
795 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFD)) in StoreRegToStackSlot()
800 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFS)) in StoreRegToStackSlot()
805 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_CR)) in StoreRegToStackSlot()
811 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_CRBIT)) in StoreRegToStackSlot()
817 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STVX)) in StoreRegToStackSlot()
823 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STXVD2X)) in StoreRegToStackSlot()
829 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STXSDX)) in StoreRegToStackSlot()
[all …]
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| D | PPCInstrInfo.h | 74 SmallVectorImpl<MachineInstr*> &NewMIs,
79 SmallVectorImpl<MachineInstr*> &NewMIs,
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 279 SmallVectorImpl<MachineInstr*> &NewMIs) const;
292 SmallVectorImpl<MachineInstr*> &NewMIs) const;
325 SmallVectorImpl<MachineInstr*> &NewMIs) const override;
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| D | X86InstrInfo.cpp | 3305 SmallVectorImpl<MachineInstr*> &NewMIs) const { in storeRegToAddr()
3316 NewMIs.push_back(MIB); in storeRegToAddr()
3340 SmallVectorImpl<MachineInstr*> &NewMIs) const { in loadRegFromAddr()
3350 NewMIs.push_back(MIB); in loadRegFromAddr()
4582 SmallVectorImpl<MachineInstr*> &NewMIs) const { in unfoldMemoryOperand()
4629 loadRegFromAddr(MF, Reg, AddrOps, RC, MMOs.first, MMOs.second, NewMIs); in unfoldMemoryOperand()
4633 MachineOperand &MO = NewMIs[0]->getOperand(i); in unfoldMemoryOperand()
4690 NewMIs.push_back(DataMI); in unfoldMemoryOperand()
4699 storeRegToAddr(MF, Reg, true, AddrOps, DstRC, MMOs.first, MMOs.second, NewMIs); in unfoldMemoryOperand()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.h | 92 SmallVectorImpl<MachineInstr*> &NewMIs) const;
103 SmallVectorImpl<MachineInstr*> &NewMIs) const;
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| D | HexagonInstrInfo.cpp | 513 SmallVectorImpl<MachineInstr*> &NewMIs) const in storeRegToAddr()
553 SmallVectorImpl<MachineInstr*> &NewMIs) const { in loadRegFromAddr()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.h | 103 SmallVectorImpl<MachineInstr *> &NewMIs) const;
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| D | AMDGPUInstrInfo.cpp | 167 SmallVectorImpl<MachineInstr*> &NewMIs) const { in unfoldMemoryOperand()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.h | 103 SmallVectorImpl<MachineInstr *> &NewMIs) const;
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| D | AMDGPUInstrInfo.cpp | 167 SmallVectorImpl<MachineInstr*> &NewMIs) const { in unfoldMemoryOperand()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUInstrInfo.h | 117 SmallVectorImpl<MachineInstr *> &NewMIs) const override;
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| D | AMDGPUInstrInfo.cpp | 198 SmallVectorImpl<MachineInstr*> &NewMIs) const { in unfoldMemoryOperand()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 213 std::vector<MachineInstr*> NewMIs; in convertToThreeAddress() local
223 NewMIs.push_back(MemMI); in convertToThreeAddress()
224 NewMIs.push_back(UpdateMI); in convertToThreeAddress()
236 NewMIs.push_back(UpdateMI); in convertToThreeAddress()
237 NewMIs.push_back(MemMI); in convertToThreeAddress()
256 MachineInstr *NewMI = NewMIs[j]; in convertToThreeAddress()
269 MFI->insert(MBBI, NewMIs[1]); in convertToThreeAddress()
270 MFI->insert(MBBI, NewMIs[0]); in convertToThreeAddress()
271 return NewMIs[0]; in convertToThreeAddress()
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 599 SmallVectorImpl<MachineInstr*> &NewMIs) const{ in unfoldMemoryOperand() argument
|