Searched refs:TrueReg (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 422 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
448 unsigned TrueReg, unsigned FalseReg) const { in insertSelect() argument
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 371 unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, in canInsertSelect() argument
376 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
390 if (canFoldIntoCSel(MRI, TrueReg)) in canInsertSelect()
414 unsigned TrueReg, unsigned FalseReg) const { in insertSelect() argument
517 unsigned FoldedOpc = canFoldIntoCSel(MRI, TrueReg, &NewVReg); in insertSelect()
522 TrueReg = FalseReg; in insertSelect()
536 MRI.constrainRegClass(TrueReg, RC); in insertSelect()
540 BuildMI(MBB, I, DL, get(Opc), DstReg).addReg(TrueReg).addReg(FalseReg).addImm( in insertSelect()
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| D | AArch64InstrInfo.h | 142 unsigned TrueReg, unsigned FalseReg) const override;
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| D | AArch64FastISel.cpp | 1035 unsigned TrueReg = getRegForValue(SI->getTrueValue()); in SelectSelect() local
1036 if (TrueReg == 0) in SelectSelect()
1077 .addReg(TrueReg) in SelectSelect()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 147 unsigned TrueReg, unsigned FalseReg) const override;
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| D | PPCInstrInfo.cpp | 586 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
602 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
628 unsigned TrueReg, unsigned FalseReg) const { in insertSelect() argument
638 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in insertSelect()
667 unsigned FirstReg = SwapOps ? FalseReg : TrueReg, in insertSelect()
668 SecondReg = SwapOps ? TrueReg : FalseReg; in insertSelect()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 263 unsigned TrueReg, unsigned FalseReg) const override;
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| D | X86InstrInfo.cpp | 2973 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
2987 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
3011 unsigned TrueReg, unsigned FalseReg) const { in insertSelect() argument
3017 BuildMI(MBB, I, DL, get(Opc), DstReg).addReg(FalseReg).addReg(TrueReg); in insertSelect()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 2620 unsigned TrueReg = MI->getOperand(1).getReg(); in emitSelect() local
2649 .addReg(TrueReg).addMBB(StartMBB) in emitSelect()
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