/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/draw/ |
D | draw_vs_ppc.c | 127 (float (*)[4]) shader->base.immediates, in vs_ppc_run_linear() 163 align_free( (void *) shader->base.immediates ); in vs_ppc_delete() 193 vs->base.immediates = align_malloc(TGSI_EXEC_NUM_IMMEDIATES * 4 * in draw_create_vs_ppc() 205 (float (*)[4]) vs->base.immediates, in draw_create_vs_ppc()
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D | draw_vs.h | 118 const float (*immediates)[4]; member
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/external/mesa3d/src/gallium/auxiliary/draw/ |
D | draw_vs_ppc.c | 127 (float (*)[4]) shader->base.immediates, in vs_ppc_run_linear() 163 align_free( (void *) shader->base.immediates ); in vs_ppc_delete() 193 vs->base.immediates = align_malloc(TGSI_EXEC_NUM_IMMEDIATES * 4 * in draw_create_vs_ppc() 205 (float (*)[4]) vs->base.immediates, in draw_create_vs_ppc()
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D | draw_vs.h | 118 const float (*immediates)[4]; member
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/external/llvm/test/CodeGen/AArch64/ |
D | addsub.ll | 10 ; Add pure 12-bit immediates: 27 ; Add 12-bit immediates, shifted left by 12 bits 44 ; Subtract 12-bit immediates 61 ; Subtract 12-bit immediates, shifted left by 12 bits
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/external/llvm/test/CodeGen/ARM/ |
D | inlineasm-imm-arm.ll | 15 ; Test ARM-mode "K" constraint, for bitwise inverted Data Processing immediates. 21 ; Test ARM-mode "L" constraint, for negated Data Processing immediates.
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/external/llvm/test/MC/ARM/ |
D | thumb-diagnostics.s | 27 @ Out of range immediates for ASR instruction. 33 @ Out of range immediates for BKPT instruction. 43 @ Out of range immediates for v8 HLT instruction. 107 @ Out of range immediates for LSL instruction. 124 @ Out of range immediates for STR instruction. 174 @ B/Bcc - out of range immediates for Thumb1 branches
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/external/llvm/test/CodeGen/Thumb/ |
D | inlineasm-imm-thumb.ll | 9 ; Test Thumb-mode "J" constraint, for negated ADD immediates. 21 ; Test Thumb-mode "L" constraint, for 3-operand ADD immediates.
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/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
D | tgsi_ppc.h | 44 float (*immediates)[4],
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_ppc.h | 44 float (*immediates)[4],
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/external/vixl/doc/ |
D | changelog.md | 26 negative immediates. 27 + Added support for using `movn` when generating immediates.
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/external/llvm/test/CodeGen/PowerPC/ |
D | fold-li.ll | 4 ;; Test that immediates are folded into these instructions correctly.
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D | subc.ll | 1 ; All of these should be codegen'd without loading immediates
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D | addc.ll | 1 ; All of these should be codegen'd without loading immediates
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/external/llvm/lib/Target/X86/Disassembler/ |
D | X86DisassemblerDecoder.cpp | 1587 insn->immediates[insn->numImmediatesConsumed] = imm8; in readImmediate() 1592 insn->immediates[insn->numImmediatesConsumed] = imm16; in readImmediate() 1597 insn->immediates[insn->numImmediatesConsumed] = imm32; in readImmediate() 1602 insn->immediates[insn->numImmediatesConsumed] = imm64; in readImmediate() 1702 insn->immediates[insn->numImmediatesConsumed] = in readOperands() 1703 insn->immediates[insn->numImmediatesConsumed - 1] & 0xf; in readOperands() 1710 insn->immediates[insn->numImmediatesConsumed - 1] > 7) in readOperands() 1713 insn->immediates[insn->numImmediatesConsumed - 1] > 31) in readOperands()
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/external/llvm/test/MC/AArch64/ |
D | arm64-optional-hash.s | 15 ; FP immediates
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZOperands.td | 205 // i32 immediates 228 // Short immediates 257 // Full 32-bit immediates. we need both signed and unsigned versions 266 // 64-bit immediates 325 // Short immediates. 357 // Floating-point immediates
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
D | lp_bld_tgsi.h | 370 LLVMValueRef immediates[LP_MAX_TGSI_IMMEDIATES][TGSI_NUM_CHANNELS]; member 456 LLVMValueRef immediates[LP_MAX_TGSI_IMMEDIATES]; member
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/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/ |
D | lp_bld_tgsi.h | 370 LLVMValueRef immediates[LP_MAX_TGSI_IMMEDIATES][TGSI_NUM_CHANNELS]; member 456 LLVMValueRef immediates[LP_MAX_TGSI_IMMEDIATES]; member
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/external/llvm/test/Transforms/ConstantHoisting/X86/ |
D | large-immediate.ll | 29 ; Check that we don't hoist immediates with small values.
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/external/mesa3d/src/mesa/state_tracker/ |
D | st_glsl_to_tgsi.cpp | 358 exec_list immediates; member in glsl_to_tgsi_visitor 881 foreach_iter(exec_list_iterator, iter, this->immediates) { in add_constant() 894 this->immediates.push_tail(entry); in add_constant() 3702 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates)); in get_pixel_transfer_visitor() 3833 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates)); in get_bitmap_visitor() 3894 struct ureg_src *immediates; member 4075 return t->immediates[index]; in src_register() 4739 t->immediates = (struct ureg_src *)CALLOC(program->num_immediates * sizeof(struct ureg_src)); in st_translate_program() 4740 if (t->immediates == NULL) { in st_translate_program() 4745 foreach_iter(exec_list_iterator, iter, program->immediates) { in st_translate_program() [all …]
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/external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/ |
D | st_glsl_to_tgsi.cpp | 358 exec_list immediates; member in glsl_to_tgsi_visitor 881 foreach_iter(exec_list_iterator, iter, this->immediates) { in add_constant() 894 this->immediates.push_tail(entry); in add_constant() 3702 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates)); in get_pixel_transfer_visitor() 3833 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates)); in get_bitmap_visitor() 3894 struct ureg_src *immediates; member 4075 return t->immediates[index]; in src_register() 4739 t->immediates = (struct ureg_src *)CALLOC(program->num_immediates * sizeof(struct ureg_src)); in st_translate_program() 4740 if (t->immediates == NULL) { in st_translate_program() 4745 foreach_iter(exec_list_iterator, iter, program->immediates) { in st_translate_program() [all …]
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
D | TODO | 35 - Replace constants and immediates which are 0,1,-1 or a combination of those with a swizzle.
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/external/mesa3d/src/gallium/drivers/i915/ |
D | TODO | 35 - Replace constants and immediates which are 0,1,-1 or a combination of those with a swizzle.
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstr64Bit.td | 57 // All 32-bit immediates can be materialized with sethi+or, but 64-bit 58 // immediates may require more code. There may be a point where it is 64 // The ALU instructions want their simm13 operands as i32 immediates. 73 // All unsigned i32 immediates can be handled by sethi+or. 78 // All negative i33 immediates can be handled by sethi+xor.
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