1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPI_LINUX_NVME_H 20 #define _UAPI_LINUX_NVME_H 21 #include <linux/types.h> 22 struct nvme_id_power_state { 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 __le16 max_power; 25 __u8 rsvd2; 26 __u8 flags; 27 __le32 entry_lat; 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 __le32 exit_lat; 30 __u8 read_tput; 31 __u8 read_lat; 32 __u8 write_tput; 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 __u8 write_lat; 35 __u8 rsvd16[16]; 36 }; 37 enum { 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 NVME_PS_FLAGS_MAX_POWER_SCALE = 1 << 0, 40 NVME_PS_FLAGS_NON_OP_STATE = 1 << 1, 41 }; 42 struct nvme_id_ctrl { 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 __le16 vid; 45 __le16 ssvid; 46 char sn[20]; 47 char mn[40]; 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 char fr[8]; 50 __u8 rab; 51 __u8 ieee[3]; 52 __u8 mic; 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 __u8 mdts; 55 __u8 rsvd78[178]; 56 __le16 oacs; 57 __u8 acl; 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 __u8 aerl; 60 __u8 frmw; 61 __u8 lpa; 62 __u8 elpe; 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 __u8 npss; 65 __u8 rsvd264[248]; 66 __u8 sqes; 67 __u8 cqes; 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 __u8 rsvd514[2]; 70 __le32 nn; 71 __le16 oncs; 72 __le16 fuses; 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 __u8 fna; 75 __u8 vwc; 76 __le16 awun; 77 __le16 awupf; 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 __u8 rsvd530[1518]; 80 struct nvme_id_power_state psd[32]; 81 __u8 vs[1024]; 82 }; 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 enum { 85 NVME_CTRL_ONCS_COMPARE = 1 << 0, 86 NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 1 << 1, 87 NVME_CTRL_ONCS_DSM = 1 << 2, 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 }; 90 struct nvme_lbaf { 91 __le16 ms; 92 __u8 ds; 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 __u8 rp; 95 }; 96 struct nvme_id_ns { 97 __le64 nsze; 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 __le64 ncap; 100 __le64 nuse; 101 __u8 nsfeat; 102 __u8 nlbaf; 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 __u8 flbas; 105 __u8 mc; 106 __u8 dpc; 107 __u8 dps; 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 __u8 rsvd30[98]; 110 struct nvme_lbaf lbaf[16]; 111 __u8 rsvd192[192]; 112 __u8 vs[3712]; 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 }; 115 enum { 116 NVME_NS_FEAT_THIN = 1 << 0, 117 NVME_LBAF_RP_BEST = 0, 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 NVME_LBAF_RP_BETTER = 1, 120 NVME_LBAF_RP_GOOD = 2, 121 NVME_LBAF_RP_DEGRADED = 3, 122 }; 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 struct nvme_smart_log { 125 __u8 critical_warning; 126 __u8 temperature[2]; 127 __u8 avail_spare; 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 __u8 spare_thresh; 130 __u8 percent_used; 131 __u8 rsvd6[26]; 132 __u8 data_units_read[16]; 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 __u8 data_units_written[16]; 135 __u8 host_reads[16]; 136 __u8 host_writes[16]; 137 __u8 ctrl_busy_time[16]; 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 __u8 power_cycles[16]; 140 __u8 power_on_hours[16]; 141 __u8 unsafe_shutdowns[16]; 142 __u8 media_errors[16]; 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 __u8 num_err_log_entries[16]; 145 __u8 rsvd192[320]; 146 }; 147 enum { 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 NVME_SMART_CRIT_SPARE = 1 << 0, 150 NVME_SMART_CRIT_TEMPERATURE = 1 << 1, 151 NVME_SMART_CRIT_RELIABILITY = 1 << 2, 152 NVME_SMART_CRIT_MEDIA = 1 << 3, 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4, 155 }; 156 struct nvme_lba_range_type { 157 __u8 type; 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 __u8 attributes; 160 __u8 rsvd2[14]; 161 __u64 slba; 162 __u64 nlb; 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 __u8 guid[16]; 165 __u8 rsvd48[16]; 166 }; 167 enum { 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 NVME_LBART_TYPE_FS = 0x01, 170 NVME_LBART_TYPE_RAID = 0x02, 171 NVME_LBART_TYPE_CACHE = 0x03, 172 NVME_LBART_TYPE_SWAP = 0x04, 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 NVME_LBART_ATTRIB_TEMP = 1 << 0, 175 NVME_LBART_ATTRIB_HIDE = 1 << 1, 176 }; 177 enum nvme_opcode { 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 nvme_cmd_flush = 0x00, 180 nvme_cmd_write = 0x01, 181 nvme_cmd_read = 0x02, 182 nvme_cmd_write_uncor = 0x04, 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 nvme_cmd_compare = 0x05, 185 nvme_cmd_dsm = 0x09, 186 }; 187 struct nvme_common_command { 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 __u8 opcode; 190 __u8 flags; 191 __u16 command_id; 192 __le32 nsid; 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 __le32 cdw2[2]; 195 __le64 metadata; 196 __le64 prp1; 197 __le64 prp2; 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 __le32 cdw10[6]; 200 }; 201 struct nvme_rw_command { 202 __u8 opcode; 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 __u8 flags; 205 __u16 command_id; 206 __le32 nsid; 207 __u64 rsvd2; 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 __le64 metadata; 210 __le64 prp1; 211 __le64 prp2; 212 __le64 slba; 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 __le16 length; 215 __le16 control; 216 __le32 dsmgmt; 217 __le32 reftag; 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 __le16 apptag; 220 __le16 appmask; 221 }; 222 enum { 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 NVME_RW_LR = 1 << 15, 225 NVME_RW_FUA = 1 << 14, 226 NVME_RW_DSM_FREQ_UNSPEC = 0, 227 NVME_RW_DSM_FREQ_TYPICAL = 1, 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 NVME_RW_DSM_FREQ_RARE = 2, 230 NVME_RW_DSM_FREQ_READS = 3, 231 NVME_RW_DSM_FREQ_WRITES = 4, 232 NVME_RW_DSM_FREQ_RW = 5, 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 NVME_RW_DSM_FREQ_ONCE = 6, 235 NVME_RW_DSM_FREQ_PREFETCH = 7, 236 NVME_RW_DSM_FREQ_TEMP = 8, 237 NVME_RW_DSM_LATENCY_NONE = 0 << 4, 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 NVME_RW_DSM_LATENCY_IDLE = 1 << 4, 240 NVME_RW_DSM_LATENCY_NORM = 2 << 4, 241 NVME_RW_DSM_LATENCY_LOW = 3 << 4, 242 NVME_RW_DSM_SEQ_REQ = 1 << 6, 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 NVME_RW_DSM_COMPRESSED = 1 << 7, 245 }; 246 struct nvme_dsm_cmd { 247 __u8 opcode; 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 __u8 flags; 250 __u16 command_id; 251 __le32 nsid; 252 __u64 rsvd2[2]; 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 __le64 prp1; 255 __le64 prp2; 256 __le32 nr; 257 __le32 attributes; 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 __u32 rsvd12[4]; 260 }; 261 enum { 262 NVME_DSMGMT_IDR = 1 << 0, 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 NVME_DSMGMT_IDW = 1 << 1, 265 NVME_DSMGMT_AD = 1 << 2, 266 }; 267 struct nvme_dsm_range { 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 __le32 cattr; 270 __le32 nlb; 271 __le64 slba; 272 }; 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 enum nvme_admin_opcode { 275 nvme_admin_delete_sq = 0x00, 276 nvme_admin_create_sq = 0x01, 277 nvme_admin_get_log_page = 0x02, 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 nvme_admin_delete_cq = 0x04, 280 nvme_admin_create_cq = 0x05, 281 nvme_admin_identify = 0x06, 282 nvme_admin_abort_cmd = 0x08, 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 nvme_admin_set_features = 0x09, 285 nvme_admin_get_features = 0x0a, 286 nvme_admin_async_event = 0x0c, 287 nvme_admin_activate_fw = 0x10, 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 nvme_admin_download_fw = 0x11, 290 nvme_admin_format_nvm = 0x80, 291 nvme_admin_security_send = 0x81, 292 nvme_admin_security_recv = 0x82, 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 }; 295 enum { 296 NVME_QUEUE_PHYS_CONTIG = (1 << 0), 297 NVME_CQ_IRQ_ENABLED = (1 << 1), 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 NVME_SQ_PRIO_URGENT = (0 << 1), 300 NVME_SQ_PRIO_HIGH = (1 << 1), 301 NVME_SQ_PRIO_MEDIUM = (2 << 1), 302 NVME_SQ_PRIO_LOW = (3 << 1), 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 NVME_FEAT_ARBITRATION = 0x01, 305 NVME_FEAT_POWER_MGMT = 0x02, 306 NVME_FEAT_LBA_RANGE = 0x03, 307 NVME_FEAT_TEMP_THRESH = 0x04, 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 NVME_FEAT_ERR_RECOVERY = 0x05, 310 NVME_FEAT_VOLATILE_WC = 0x06, 311 NVME_FEAT_NUM_QUEUES = 0x07, 312 NVME_FEAT_IRQ_COALESCE = 0x08, 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 NVME_FEAT_IRQ_CONFIG = 0x09, 315 NVME_FEAT_WRITE_ATOMIC = 0x0a, 316 NVME_FEAT_ASYNC_EVENT = 0x0b, 317 NVME_FEAT_SW_PROGRESS = 0x0c, 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 NVME_FWACT_REPL = (0 << 3), 320 NVME_FWACT_REPL_ACTV = (1 << 3), 321 NVME_FWACT_ACTV = (2 << 3), 322 }; 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 struct nvme_identify { 325 __u8 opcode; 326 __u8 flags; 327 __u16 command_id; 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 __le32 nsid; 330 __u64 rsvd2[2]; 331 __le64 prp1; 332 __le64 prp2; 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 __le32 cns; 335 __u32 rsvd11[5]; 336 }; 337 struct nvme_features { 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 __u8 opcode; 340 __u8 flags; 341 __u16 command_id; 342 __le32 nsid; 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 __u64 rsvd2[2]; 345 __le64 prp1; 346 __le64 prp2; 347 __le32 fid; 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 __le32 dword11; 350 __u32 rsvd12[4]; 351 }; 352 struct nvme_create_cq { 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 __u8 opcode; 355 __u8 flags; 356 __u16 command_id; 357 __u32 rsvd1[5]; 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 __le64 prp1; 360 __u64 rsvd8; 361 __le16 cqid; 362 __le16 qsize; 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 __le16 cq_flags; 365 __le16 irq_vector; 366 __u32 rsvd12[4]; 367 }; 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 struct nvme_create_sq { 370 __u8 opcode; 371 __u8 flags; 372 __u16 command_id; 373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 __u32 rsvd1[5]; 375 __le64 prp1; 376 __u64 rsvd8; 377 __le16 sqid; 378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379 __le16 qsize; 380 __le16 sq_flags; 381 __le16 cqid; 382 __u32 rsvd12[4]; 383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 }; 385 struct nvme_delete_queue { 386 __u8 opcode; 387 __u8 flags; 388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 __u16 command_id; 390 __u32 rsvd1[9]; 391 __le16 qid; 392 __u16 rsvd10; 393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394 __u32 rsvd11[5]; 395 }; 396 struct nvme_abort_cmd { 397 __u8 opcode; 398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399 __u8 flags; 400 __u16 command_id; 401 __u32 rsvd1[9]; 402 __le16 sqid; 403 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404 __u16 cid; 405 __u32 rsvd11[5]; 406 }; 407 struct nvme_download_firmware { 408 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 409 __u8 opcode; 410 __u8 flags; 411 __u16 command_id; 412 __u32 rsvd1[5]; 413 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 414 __le64 prp1; 415 __le64 prp2; 416 __le32 numd; 417 __le32 offset; 418 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 419 __u32 rsvd12[4]; 420 }; 421 struct nvme_format_cmd { 422 __u8 opcode; 423 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 424 __u8 flags; 425 __u16 command_id; 426 __le32 nsid; 427 __u64 rsvd2[4]; 428 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 429 __le32 cdw10; 430 __u32 rsvd11[5]; 431 }; 432 struct nvme_command { 433 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 434 union { 435 struct nvme_common_command common; 436 struct nvme_rw_command rw; 437 struct nvme_identify identify; 438 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 439 struct nvme_features features; 440 struct nvme_create_cq create_cq; 441 struct nvme_create_sq create_sq; 442 struct nvme_delete_queue delete_queue; 443 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 444 struct nvme_download_firmware dlfw; 445 struct nvme_format_cmd format; 446 struct nvme_dsm_cmd dsm; 447 struct nvme_abort_cmd abort; 448 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 449 }; 450 }; 451 enum { 452 NVME_SC_SUCCESS = 0x0, 453 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 454 NVME_SC_INVALID_OPCODE = 0x1, 455 NVME_SC_INVALID_FIELD = 0x2, 456 NVME_SC_CMDID_CONFLICT = 0x3, 457 NVME_SC_DATA_XFER_ERROR = 0x4, 458 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 459 NVME_SC_POWER_LOSS = 0x5, 460 NVME_SC_INTERNAL = 0x6, 461 NVME_SC_ABORT_REQ = 0x7, 462 NVME_SC_ABORT_QUEUE = 0x8, 463 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 464 NVME_SC_FUSED_FAIL = 0x9, 465 NVME_SC_FUSED_MISSING = 0xa, 466 NVME_SC_INVALID_NS = 0xb, 467 NVME_SC_CMD_SEQ_ERROR = 0xc, 468 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 469 NVME_SC_LBA_RANGE = 0x80, 470 NVME_SC_CAP_EXCEEDED = 0x81, 471 NVME_SC_NS_NOT_READY = 0x82, 472 NVME_SC_CQ_INVALID = 0x100, 473 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 474 NVME_SC_QID_INVALID = 0x101, 475 NVME_SC_QUEUE_SIZE = 0x102, 476 NVME_SC_ABORT_LIMIT = 0x103, 477 NVME_SC_ABORT_MISSING = 0x104, 478 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 479 NVME_SC_ASYNC_LIMIT = 0x105, 480 NVME_SC_FIRMWARE_SLOT = 0x106, 481 NVME_SC_FIRMWARE_IMAGE = 0x107, 482 NVME_SC_INVALID_VECTOR = 0x108, 483 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 484 NVME_SC_INVALID_LOG_PAGE = 0x109, 485 NVME_SC_INVALID_FORMAT = 0x10a, 486 NVME_SC_BAD_ATTRIBUTES = 0x180, 487 NVME_SC_WRITE_FAULT = 0x280, 488 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 489 NVME_SC_READ_ERROR = 0x281, 490 NVME_SC_GUARD_CHECK = 0x282, 491 NVME_SC_APPTAG_CHECK = 0x283, 492 NVME_SC_REFTAG_CHECK = 0x284, 493 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 494 NVME_SC_COMPARE_FAILED = 0x285, 495 NVME_SC_ACCESS_DENIED = 0x286, 496 }; 497 struct nvme_completion { 498 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 499 __le32 result; 500 __u32 rsvd; 501 __le16 sq_head; 502 __le16 sq_id; 503 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 504 __u16 command_id; 505 __le16 status; 506 }; 507 struct nvme_user_io { 508 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 509 __u8 opcode; 510 __u8 flags; 511 __u16 control; 512 __u16 nblocks; 513 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 514 __u16 rsvd; 515 __u64 metadata; 516 __u64 addr; 517 __u64 slba; 518 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 519 __u32 dsmgmt; 520 __u32 reftag; 521 __u16 apptag; 522 __u16 appmask; 523 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 524 }; 525 struct nvme_admin_cmd { 526 __u8 opcode; 527 __u8 flags; 528 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 529 __u16 rsvd1; 530 __u32 nsid; 531 __u32 cdw2; 532 __u32 cdw3; 533 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 534 __u64 metadata; 535 __u64 addr; 536 __u32 metadata_len; 537 __u32 data_len; 538 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 539 __u32 cdw10; 540 __u32 cdw11; 541 __u32 cdw12; 542 __u32 cdw13; 543 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 544 __u32 cdw14; 545 __u32 cdw15; 546 __u32 timeout_ms; 547 __u32 result; 548 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 549 }; 550 #define NVME_IOCTL_ID _IO('N', 0x40) 551 #define NVME_IOCTL_ADMIN_CMD _IOWR('N', 0x41, struct nvme_admin_cmd) 552 #define NVME_IOCTL_SUBMIT_IO _IOW('N', 0x42, struct nvme_user_io) 553 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 554 #endif 555