1 // RUN: %clang_cc1 -triple arm64-apple-ios7.0 -target-feature +neon -ffreestanding -emit-llvm -o - -O1 %s | FileCheck %s
2 #include <arm_neon.h>
3
test_vqshl_n_s8(int8x8_t in)4 int8x8_t test_vqshl_n_s8(int8x8_t in) {
5 // CHECK-LABEL: @test_vqshl_n_s8
6 // CHECK: call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> %in, <8 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)
7 return vqshl_n_s8(in, 1);
8 }
9
test_vqshl_n_s16(int16x4_t in)10 int16x4_t test_vqshl_n_s16(int16x4_t in) {
11 // CHECK-LABEL: @test_vqshl_n_s16
12 // CHECK: call <4 x i16> @llvm.aarch64.neon.sqshl.v4i16(<4 x i16> %in, <4 x i16> <i16 1, i16 1, i16 1, i16 1>)
13 return vqshl_n_s16(in, 1);
14 }
15
test_vqshl_n_s32(int32x2_t in)16 int32x2_t test_vqshl_n_s32(int32x2_t in) {
17 // CHECK-LABEL: @test_vqshl_n_s32
18 // CHECK: call <2 x i32> @llvm.aarch64.neon.sqshl.v2i32(<2 x i32> %in, <2 x i32> <i32 1, i32 1>)
19 return vqshl_n_s32(in, 1);
20 }
21
test_vqshl_n_s64(int64x1_t in)22 int64x1_t test_vqshl_n_s64(int64x1_t in) {
23 // CHECK-LABEL: @test_vqshl_n_s64
24 // CHECK: call <1 x i64> @llvm.aarch64.neon.sqshl.v1i64(<1 x i64> %in, <1 x i64> <i64 1>)
25 return vqshl_n_s64(in, 1);
26 }
27
28
test_vqshlq_n_s8(int8x16_t in)29 int8x16_t test_vqshlq_n_s8(int8x16_t in) {
30 // CHECK-LABEL: @test_vqshlq_n_s8
31 // CHECK: call <16 x i8> @llvm.aarch64.neon.sqshl.v16i8(<16 x i8> %in, <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)
32 return vqshlq_n_s8(in, 1);
33 }
34
test_vqshlq_n_s16(int16x8_t in)35 int16x8_t test_vqshlq_n_s16(int16x8_t in) {
36 // CHECK-LABEL: @test_vqshlq_n_s16
37 // CHECK: call <8 x i16> @llvm.aarch64.neon.sqshl.v8i16(<8 x i16> %in, <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>)
38 return vqshlq_n_s16(in, 1);
39 }
40
test_vqshlq_n_s32(int32x4_t in)41 int32x4_t test_vqshlq_n_s32(int32x4_t in) {
42 // CHECK-LABEL: @test_vqshlq_n_s32
43 // CHECK: call <4 x i32> @llvm.aarch64.neon.sqshl.v4i32(<4 x i32> %in, <4 x i32> <i32 1, i32 1, i32 1, i32 1>)
44 return vqshlq_n_s32(in, 1);
45 }
46
test_vqshlq_n_s64(int64x2_t in)47 int64x2_t test_vqshlq_n_s64(int64x2_t in) {
48 // CHECK-LABEL: @test_vqshlq_n_s64
49 // CHECK: call <2 x i64> @llvm.aarch64.neon.sqshl.v2i64(<2 x i64> %in, <2 x i64> <i64 1, i64 1>
50 return vqshlq_n_s64(in, 1);
51 }
52
test_vqshl_n_u8(uint8x8_t in)53 uint8x8_t test_vqshl_n_u8(uint8x8_t in) {
54 // CHECK-LABEL: @test_vqshl_n_u8
55 // CHECK: call <8 x i8> @llvm.aarch64.neon.uqshl.v8i8(<8 x i8> %in, <8 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)
56 return vqshl_n_u8(in, 1);
57 }
58
test_vqshl_n_u16(uint16x4_t in)59 uint16x4_t test_vqshl_n_u16(uint16x4_t in) {
60 // CHECK-LABEL: @test_vqshl_n_u16
61 // CHECK: call <4 x i16> @llvm.aarch64.neon.uqshl.v4i16(<4 x i16> %in, <4 x i16> <i16 1, i16 1, i16 1, i16 1>)
62 return vqshl_n_u16(in, 1);
63 }
64
test_vqshl_n_u32(uint32x2_t in)65 uint32x2_t test_vqshl_n_u32(uint32x2_t in) {
66 // CHECK-LABEL: @test_vqshl_n_u32
67 // CHECK: call <2 x i32> @llvm.aarch64.neon.uqshl.v2i32(<2 x i32> %in, <2 x i32> <i32 1, i32 1>)
68 return vqshl_n_u32(in, 1);
69 }
70
test_vqshl_n_u64(uint64x1_t in)71 uint64x1_t test_vqshl_n_u64(uint64x1_t in) {
72 // CHECK-LABEL: @test_vqshl_n_u64
73 // CHECK: call <1 x i64> @llvm.aarch64.neon.uqshl.v1i64(<1 x i64> %in, <1 x i64> <i64 1>)
74 return vqshl_n_u64(in, 1);
75 }
76
test_vqshlq_n_u8(uint8x16_t in)77 uint8x16_t test_vqshlq_n_u8(uint8x16_t in) {
78 // CHECK-LABEL: @test_vqshlq_n_u8
79 // CHECK: call <16 x i8> @llvm.aarch64.neon.uqshl.v16i8(<16 x i8> %in, <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)
80 return vqshlq_n_u8(in, 1);
81 }
82
test_vqshlq_n_u16(uint16x8_t in)83 uint16x8_t test_vqshlq_n_u16(uint16x8_t in) {
84 // CHECK-LABEL: @test_vqshlq_n_u16
85 // CHECK: call <8 x i16> @llvm.aarch64.neon.uqshl.v8i16(<8 x i16> %in, <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>)
86 return vqshlq_n_u16(in, 1);
87 }
88
test_vqshlq_n_u32(uint32x4_t in)89 uint32x4_t test_vqshlq_n_u32(uint32x4_t in) {
90 // CHECK-LABEL: @test_vqshlq_n_u32
91 // CHECK: call <4 x i32> @llvm.aarch64.neon.uqshl.v4i32(<4 x i32> %in, <4 x i32> <i32 1, i32 1, i32 1, i32 1>)
92 return vqshlq_n_u32(in, 1);
93 }
94
test_vqshlq_n_u64(uint64x2_t in)95 uint64x2_t test_vqshlq_n_u64(uint64x2_t in) {
96 // CHECK-LABEL: @test_vqshlq_n_u64
97 // CHECK: call <2 x i64> @llvm.aarch64.neon.uqshl.v2i64(<2 x i64> %in, <2 x i64> <i64 1, i64 1>
98 return vqshlq_n_u64(in, 1);
99 }
100
test_vrshr_n_s8(int8x8_t in)101 int8x8_t test_vrshr_n_s8(int8x8_t in) {
102 // CHECK-LABEL: @test_vrshr_n_s8
103 // CHECK: call <8 x i8> @llvm.aarch64.neon.srshl.v8i8(<8 x i8> %in, <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
104 return vrshr_n_s8(in, 1);
105 }
106
test_vrshr_n_s16(int16x4_t in)107 int16x4_t test_vrshr_n_s16(int16x4_t in) {
108 // CHECK-LABEL: @test_vrshr_n_s16
109 // CHECK: call <4 x i16> @llvm.aarch64.neon.srshl.v4i16(<4 x i16> %in, <4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>)
110 return vrshr_n_s16(in, 1);
111 }
112
test_vrshr_n_s32(int32x2_t in)113 int32x2_t test_vrshr_n_s32(int32x2_t in) {
114 // CHECK-LABEL: @test_vrshr_n_s32
115 // CHECK: call <2 x i32> @llvm.aarch64.neon.srshl.v2i32(<2 x i32> %in, <2 x i32> <i32 -1, i32 -1>)
116 return vrshr_n_s32(in, 1);
117 }
118
test_vrshr_n_s64(int64x1_t in)119 int64x1_t test_vrshr_n_s64(int64x1_t in) {
120 // CHECK-LABEL: @test_vrshr_n_s64
121 // CHECK: call <1 x i64> @llvm.aarch64.neon.srshl.v1i64(<1 x i64> %in, <1 x i64> <i64 -1>)
122 return vrshr_n_s64(in, 1);
123 }
124
125
test_vrshrq_n_s8(int8x16_t in)126 int8x16_t test_vrshrq_n_s8(int8x16_t in) {
127 // CHECK-LABEL: @test_vrshrq_n_s8
128 // CHECK: call <16 x i8> @llvm.aarch64.neon.srshl.v16i8(<16 x i8> %in, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
129 return vrshrq_n_s8(in, 1);
130 }
131
test_vrshrq_n_s16(int16x8_t in)132 int16x8_t test_vrshrq_n_s16(int16x8_t in) {
133 // CHECK-LABEL: @test_vrshrq_n_s16
134 // CHECK: call <8 x i16> @llvm.aarch64.neon.srshl.v8i16(<8 x i16> %in, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>)
135 return vrshrq_n_s16(in, 1);
136 }
137
test_vrshrq_n_s32(int32x4_t in)138 int32x4_t test_vrshrq_n_s32(int32x4_t in) {
139 // CHECK-LABEL: @test_vrshrq_n_s32
140 // CHECK: call <4 x i32> @llvm.aarch64.neon.srshl.v4i32(<4 x i32> %in, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>)
141 return vrshrq_n_s32(in, 1);
142 }
143
test_vrshrq_n_s64(int64x2_t in)144 int64x2_t test_vrshrq_n_s64(int64x2_t in) {
145 // CHECK-LABEL: @test_vrshrq_n_s64
146 // CHECK: call <2 x i64> @llvm.aarch64.neon.srshl.v2i64(<2 x i64> %in, <2 x i64> <i64 -1, i64 -1>
147 return vrshrq_n_s64(in, 1);
148 }
149
test_vrshr_n_u8(uint8x8_t in)150 uint8x8_t test_vrshr_n_u8(uint8x8_t in) {
151 // CHECK-LABEL: @test_vrshr_n_u8
152 // CHECK: call <8 x i8> @llvm.aarch64.neon.urshl.v8i8(<8 x i8> %in, <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
153 return vrshr_n_u8(in, 1);
154 }
155
test_vrshr_n_u16(uint16x4_t in)156 uint16x4_t test_vrshr_n_u16(uint16x4_t in) {
157 // CHECK-LABEL: @test_vrshr_n_u16
158 // CHECK: call <4 x i16> @llvm.aarch64.neon.urshl.v4i16(<4 x i16> %in, <4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>)
159 return vrshr_n_u16(in, 1);
160 }
161
test_vrshr_n_u32(uint32x2_t in)162 uint32x2_t test_vrshr_n_u32(uint32x2_t in) {
163 // CHECK-LABEL: @test_vrshr_n_u32
164 // CHECK: call <2 x i32> @llvm.aarch64.neon.urshl.v2i32(<2 x i32> %in, <2 x i32> <i32 -1, i32 -1>)
165 return vrshr_n_u32(in, 1);
166 }
167
test_vrshr_n_u64(uint64x1_t in)168 uint64x1_t test_vrshr_n_u64(uint64x1_t in) {
169 // CHECK-LABEL: @test_vrshr_n_u64
170 // CHECK: call <1 x i64> @llvm.aarch64.neon.urshl.v1i64(<1 x i64> %in, <1 x i64> <i64 -1>)
171 return vrshr_n_u64(in, 1);
172 }
173
test_vrshrq_n_u8(uint8x16_t in)174 uint8x16_t test_vrshrq_n_u8(uint8x16_t in) {
175 // CHECK-LABEL: @test_vrshrq_n_u8
176 // CHECK: call <16 x i8> @llvm.aarch64.neon.urshl.v16i8(<16 x i8> %in, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
177 return vrshrq_n_u8(in, 1);
178 }
179
test_vrshrq_n_u16(uint16x8_t in)180 uint16x8_t test_vrshrq_n_u16(uint16x8_t in) {
181 // CHECK-LABEL: @test_vrshrq_n_u16
182 // CHECK: call <8 x i16> @llvm.aarch64.neon.urshl.v8i16(<8 x i16> %in, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>)
183 return vrshrq_n_u16(in, 1);
184 }
185
test_vrshrq_n_u32(uint32x4_t in)186 uint32x4_t test_vrshrq_n_u32(uint32x4_t in) {
187 // CHECK-LABEL: @test_vrshrq_n_u32
188 // CHECK: call <4 x i32> @llvm.aarch64.neon.urshl.v4i32(<4 x i32> %in, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>)
189 return vrshrq_n_u32(in, 1);
190 }
191
test_vrshrq_n_u64(uint64x2_t in)192 uint64x2_t test_vrshrq_n_u64(uint64x2_t in) {
193 // CHECK-LABEL: @test_vrshrq_n_u64
194 // CHECK: call <2 x i64> @llvm.aarch64.neon.urshl.v2i64(<2 x i64> %in, <2 x i64> <i64 -1, i64 -1>
195 return vrshrq_n_u64(in, 1);
196 }
197
test_vqshlu_n_s8(int8x8_t in)198 int8x8_t test_vqshlu_n_s8(int8x8_t in) {
199 // CHECK-LABEL: @test_vqshlu_n_s8
200 // CHECK: call <8 x i8> @llvm.aarch64.neon.sqshlu.v8i8(<8 x i8> %in, <8 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)
201 return vqshlu_n_s8(in, 1);
202 }
203
test_vqshlu_n_s16(int16x4_t in)204 int16x4_t test_vqshlu_n_s16(int16x4_t in) {
205 // CHECK-LABEL: @test_vqshlu_n_s16
206 // CHECK: call <4 x i16> @llvm.aarch64.neon.sqshlu.v4i16(<4 x i16> %in, <4 x i16> <i16 1, i16 1, i16 1, i16 1>)
207 return vqshlu_n_s16(in, 1);
208 }
209
test_vqshlu_n_s32(int32x2_t in)210 int32x2_t test_vqshlu_n_s32(int32x2_t in) {
211 // CHECK-LABEL: @test_vqshlu_n_s32
212 // CHECK: call <2 x i32> @llvm.aarch64.neon.sqshlu.v2i32(<2 x i32> %in, <2 x i32> <i32 1, i32 1>)
213 return vqshlu_n_s32(in, 1);
214 }
215
test_vqshlu_n_s64(int64x1_t in)216 int64x1_t test_vqshlu_n_s64(int64x1_t in) {
217 // CHECK-LABEL: @test_vqshlu_n_s64
218 // CHECK: call <1 x i64> @llvm.aarch64.neon.sqshlu.v1i64(<1 x i64> %in, <1 x i64> <i64 1>)
219 return vqshlu_n_s64(in, 1);
220 }
221
222
test_vqshluq_n_s8(int8x16_t in)223 int8x16_t test_vqshluq_n_s8(int8x16_t in) {
224 // CHECK-LABEL: @test_vqshluq_n_s8
225 // CHECK: call <16 x i8> @llvm.aarch64.neon.sqshlu.v16i8(<16 x i8> %in, <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>)
226 return vqshluq_n_s8(in, 1);
227 }
228
test_vqshluq_n_s16(int16x8_t in)229 int16x8_t test_vqshluq_n_s16(int16x8_t in) {
230 // CHECK-LABEL: @test_vqshluq_n_s16
231 // CHECK: call <8 x i16> @llvm.aarch64.neon.sqshlu.v8i16(<8 x i16> %in, <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>)
232 return vqshluq_n_s16(in, 1);
233 }
234
test_vqshluq_n_s32(int32x4_t in)235 int32x4_t test_vqshluq_n_s32(int32x4_t in) {
236 // CHECK-LABEL: @test_vqshluq_n_s32
237 // CHECK: call <4 x i32> @llvm.aarch64.neon.sqshlu.v4i32(<4 x i32> %in, <4 x i32> <i32 1, i32 1, i32 1, i32 1>)
238 return vqshluq_n_s32(in, 1);
239 }
240
test_vqshluq_n_s64(int64x2_t in)241 int64x2_t test_vqshluq_n_s64(int64x2_t in) {
242 // CHECK-LABEL: @test_vqshluq_n_s64
243 // CHECK: call <2 x i64> @llvm.aarch64.neon.sqshlu.v2i64(<2 x i64> %in, <2 x i64> <i64 1, i64 1>
244 return vqshluq_n_s64(in, 1);
245 }
246
test_vrsra_n_s8(int8x8_t acc,int8x8_t in)247 int8x8_t test_vrsra_n_s8(int8x8_t acc, int8x8_t in) {
248 // CHECK-LABEL: @test_vrsra_n_s8
249 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <8 x i8> @llvm.aarch64.neon.srshl.v8i8(<8 x i8> %in, <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
250 // CHECK: add <8 x i8> [[TMP]], %acc
251 return vrsra_n_s8(acc, in, 1);
252 }
253
test_vrsra_n_s16(int16x4_t acc,int16x4_t in)254 int16x4_t test_vrsra_n_s16(int16x4_t acc, int16x4_t in) {
255 // CHECK-LABEL: @test_vrsra_n_s16
256 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <4 x i16> @llvm.aarch64.neon.srshl.v4i16(<4 x i16> %in, <4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>)
257 // CHECK: add <4 x i16> [[TMP]], %acc
258 return vrsra_n_s16(acc, in, 1);
259 }
260
test_vrsra_n_s32(int32x2_t acc,int32x2_t in)261 int32x2_t test_vrsra_n_s32(int32x2_t acc, int32x2_t in) {
262 // CHECK-LABEL: @test_vrsra_n_s32
263 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <2 x i32> @llvm.aarch64.neon.srshl.v2i32(<2 x i32> %in, <2 x i32> <i32 -1, i32 -1>)
264 // CHECK: add <2 x i32> [[TMP]], %acc
265 return vrsra_n_s32(acc, in, 1);
266 }
267
test_vrsra_n_s64(int64x1_t acc,int64x1_t in)268 int64x1_t test_vrsra_n_s64(int64x1_t acc, int64x1_t in) {
269 // CHECK-LABEL: @test_vrsra_n_s64
270 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <1 x i64> @llvm.aarch64.neon.srshl.v1i64(<1 x i64> %in, <1 x i64> <i64 -1>)
271 // CHECK: add <1 x i64> [[TMP]], %acc
272 return vrsra_n_s64(acc, in, 1);
273 }
274
test_vrsraq_n_s8(int8x16_t acc,int8x16_t in)275 int8x16_t test_vrsraq_n_s8(int8x16_t acc, int8x16_t in) {
276 // CHECK-LABEL: @test_vrsraq_n_s8
277 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <16 x i8> @llvm.aarch64.neon.srshl.v16i8(<16 x i8> %in, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
278 // CHECK: add <16 x i8> [[TMP]], %acc
279 return vrsraq_n_s8(acc, in, 1);
280 }
281
test_vrsraq_n_s16(int16x8_t acc,int16x8_t in)282 int16x8_t test_vrsraq_n_s16(int16x8_t acc, int16x8_t in) {
283 // CHECK-LABEL: @test_vrsraq_n_s16
284 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <8 x i16> @llvm.aarch64.neon.srshl.v8i16(<8 x i16> %in, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>)
285 // CHECK: add <8 x i16> [[TMP]], %acc
286 return vrsraq_n_s16(acc, in, 1);
287 }
288
test_vrsraq_n_s32(int32x4_t acc,int32x4_t in)289 int32x4_t test_vrsraq_n_s32(int32x4_t acc, int32x4_t in) {
290 // CHECK-LABEL: @test_vrsraq_n_s32
291 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <4 x i32> @llvm.aarch64.neon.srshl.v4i32(<4 x i32> %in, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>)
292 // CHECK: add <4 x i32> [[TMP]], %acc
293 return vrsraq_n_s32(acc, in, 1);
294 }
295
test_vrsraq_n_s64(int64x2_t acc,int64x2_t in)296 int64x2_t test_vrsraq_n_s64(int64x2_t acc, int64x2_t in) {
297 // CHECK-LABEL: @test_vrsraq_n_s64
298 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <2 x i64> @llvm.aarch64.neon.srshl.v2i64(<2 x i64> %in, <2 x i64> <i64 -1, i64 -1>)
299 // CHECK: add <2 x i64> [[TMP]], %acc
300 return vrsraq_n_s64(acc, in, 1);
301 }
302
test_vrsra_n_u8(uint8x8_t acc,uint8x8_t in)303 uint8x8_t test_vrsra_n_u8(uint8x8_t acc, uint8x8_t in) {
304 // CHECK-LABEL: @test_vrsra_n_u8
305 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <8 x i8> @llvm.aarch64.neon.urshl.v8i8(<8 x i8> %in, <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
306 // CHECK: add <8 x i8> [[TMP]], %acc
307 return vrsra_n_u8(acc, in, 1);
308 }
309
test_vrsra_n_u16(uint16x4_t acc,uint16x4_t in)310 uint16x4_t test_vrsra_n_u16(uint16x4_t acc, uint16x4_t in) {
311 // CHECK-LABEL: @test_vrsra_n_u16
312 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <4 x i16> @llvm.aarch64.neon.urshl.v4i16(<4 x i16> %in, <4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>)
313 // CHECK: add <4 x i16> [[TMP]], %acc
314 return vrsra_n_u16(acc, in, 1);
315 }
316
test_vrsra_n_u32(uint32x2_t acc,uint32x2_t in)317 uint32x2_t test_vrsra_n_u32(uint32x2_t acc, uint32x2_t in) {
318 // CHECK-LABEL: @test_vrsra_n_u32
319 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <2 x i32> @llvm.aarch64.neon.urshl.v2i32(<2 x i32> %in, <2 x i32> <i32 -1, i32 -1>)
320 // CHECK: add <2 x i32> [[TMP]], %acc
321 return vrsra_n_u32(acc, in, 1);
322 }
323
test_vrsra_n_u64(uint64x1_t acc,uint64x1_t in)324 uint64x1_t test_vrsra_n_u64(uint64x1_t acc, uint64x1_t in) {
325 // CHECK-LABEL: @test_vrsra_n_u64
326 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <1 x i64> @llvm.aarch64.neon.urshl.v1i64(<1 x i64> %in, <1 x i64> <i64 -1>)
327 // CHECK: add <1 x i64> [[TMP]], %acc
328 return vrsra_n_u64(acc, in, 1);
329 }
330
test_vrsraq_n_u8(uint8x16_t acc,uint8x16_t in)331 uint8x16_t test_vrsraq_n_u8(uint8x16_t acc, uint8x16_t in) {
332 // CHECK-LABEL: @test_vrsraq_n_u8
333 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <16 x i8> @llvm.aarch64.neon.urshl.v16i8(<16 x i8> %in, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
334 // CHECK: add <16 x i8> [[TMP]], %acc
335 return vrsraq_n_u8(acc, in, 1);
336 }
337
test_vrsraq_n_u16(uint16x8_t acc,uint16x8_t in)338 uint16x8_t test_vrsraq_n_u16(uint16x8_t acc, uint16x8_t in) {
339 // CHECK-LABEL: @test_vrsraq_n_u16
340 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <8 x i16> @llvm.aarch64.neon.urshl.v8i16(<8 x i16> %in, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>)
341 // CHECK: add <8 x i16> [[TMP]], %acc
342 return vrsraq_n_u16(acc, in, 1);
343 }
344
test_vrsraq_n_u32(uint32x4_t acc,uint32x4_t in)345 uint32x4_t test_vrsraq_n_u32(uint32x4_t acc, uint32x4_t in) {
346 // CHECK-LABEL: @test_vrsraq_n_u32
347 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <4 x i32> @llvm.aarch64.neon.urshl.v4i32(<4 x i32> %in, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>)
348 // CHECK: add <4 x i32> [[TMP]], %acc
349 return vrsraq_n_u32(acc, in, 1);
350 }
351
test_vrsraq_n_u64(uint64x2_t acc,uint64x2_t in)352 uint64x2_t test_vrsraq_n_u64(uint64x2_t acc, uint64x2_t in) {
353 // CHECK-LABEL: @test_vrsraq_n_u64
354 // CHECK: [[TMP:%[0-9a-zA-Z._]+]] = tail call <2 x i64> @llvm.aarch64.neon.urshl.v2i64(<2 x i64> %in, <2 x i64> <i64 -1, i64 -1>)
355 // CHECK: add <2 x i64> [[TMP]], %acc
356 return vrsraq_n_u64(acc, in, 1);
357 }
358