1 //===-- X86SelectionDAGInfo.cpp - X86 SelectionDAG Info -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the X86SelectionDAGInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "X86InstrInfo.h"
15 #include "X86ISelLowering.h"
16 #include "X86RegisterInfo.h"
17 #include "X86Subtarget.h"
18 #include "X86SelectionDAGInfo.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/Target/TargetLowering.h"
22
23 using namespace llvm;
24
25 #define DEBUG_TYPE "x86-selectiondag-info"
26
X86SelectionDAGInfo(const DataLayout & DL)27 X86SelectionDAGInfo::X86SelectionDAGInfo(const DataLayout &DL)
28 : TargetSelectionDAGInfo(&DL) {}
29
~X86SelectionDAGInfo()30 X86SelectionDAGInfo::~X86SelectionDAGInfo() {}
31
32 SDValue
EmitTargetCodeForMemset(SelectionDAG & DAG,SDLoc dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,unsigned Align,bool isVolatile,MachinePointerInfo DstPtrInfo) const33 X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
34 SDValue Chain,
35 SDValue Dst, SDValue Src,
36 SDValue Size, unsigned Align,
37 bool isVolatile,
38 MachinePointerInfo DstPtrInfo) const {
39 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
40 const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
41
42 // If to a segment-relative address space, use the default lowering.
43 if (DstPtrInfo.getAddrSpace() >= 256)
44 return SDValue();
45
46 // If not DWORD aligned or size is more than the threshold, call the library.
47 // The libc version is likely to be faster for these cases. It can use the
48 // address value and run time information about the CPU.
49 if ((Align & 3) != 0 || !ConstantSize ||
50 ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) {
51 // Check to see if there is a specialized entry-point for memory zeroing.
52 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
53
54 if (const char *bzeroEntry = V &&
55 V->isNullValue() ? Subtarget.getBZeroEntry() : nullptr) {
56 EVT IntPtr = DAG.getTargetLoweringInfo().getPointerTy();
57 Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
58 TargetLowering::ArgListTy Args;
59 TargetLowering::ArgListEntry Entry;
60 Entry.Node = Dst;
61 Entry.Ty = IntPtrTy;
62 Args.push_back(Entry);
63 Entry.Node = Size;
64 Args.push_back(Entry);
65
66 TargetLowering::CallLoweringInfo CLI(DAG);
67 CLI.setDebugLoc(dl).setChain(Chain)
68 .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
69 DAG.getExternalSymbol(bzeroEntry, IntPtr), std::move(Args),
70 0)
71 .setDiscardResult();
72
73 std::pair<SDValue,SDValue> CallResult = DAG.getTargetLoweringInfo().LowerCallTo(CLI);
74 return CallResult.second;
75 }
76
77 // Otherwise have the target-independent code call memset.
78 return SDValue();
79 }
80
81 uint64_t SizeVal = ConstantSize->getZExtValue();
82 SDValue InFlag;
83 EVT AVT;
84 SDValue Count;
85 ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Src);
86 unsigned BytesLeft = 0;
87 bool TwoRepStos = false;
88 if (ValC) {
89 unsigned ValReg;
90 uint64_t Val = ValC->getZExtValue() & 255;
91
92 // If the value is a constant, then we can potentially use larger sets.
93 switch (Align & 3) {
94 case 2: // WORD aligned
95 AVT = MVT::i16;
96 ValReg = X86::AX;
97 Val = (Val << 8) | Val;
98 break;
99 case 0: // DWORD aligned
100 AVT = MVT::i32;
101 ValReg = X86::EAX;
102 Val = (Val << 8) | Val;
103 Val = (Val << 16) | Val;
104 if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
105 AVT = MVT::i64;
106 ValReg = X86::RAX;
107 Val = (Val << 32) | Val;
108 }
109 break;
110 default: // Byte aligned
111 AVT = MVT::i8;
112 ValReg = X86::AL;
113 Count = DAG.getIntPtrConstant(SizeVal);
114 break;
115 }
116
117 if (AVT.bitsGT(MVT::i8)) {
118 unsigned UBytes = AVT.getSizeInBits() / 8;
119 Count = DAG.getIntPtrConstant(SizeVal / UBytes);
120 BytesLeft = SizeVal % UBytes;
121 }
122
123 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
124 InFlag);
125 InFlag = Chain.getValue(1);
126 } else {
127 AVT = MVT::i8;
128 Count = DAG.getIntPtrConstant(SizeVal);
129 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
130 InFlag = Chain.getValue(1);
131 }
132
133 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
134 Count, InFlag);
135 InFlag = Chain.getValue(1);
136 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
137 Dst, InFlag);
138 InFlag = Chain.getValue(1);
139
140 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
141 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
142 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
143
144 if (TwoRepStos) {
145 InFlag = Chain.getValue(1);
146 Count = Size;
147 EVT CVT = Count.getValueType();
148 SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
149 DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT));
150 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX :
151 X86::ECX,
152 Left, InFlag);
153 InFlag = Chain.getValue(1);
154 Tys = DAG.getVTList(MVT::Other, MVT::Glue);
155 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
156 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
157 } else if (BytesLeft) {
158 // Handle the last 1 - 7 bytes.
159 unsigned Offset = SizeVal - BytesLeft;
160 EVT AddrVT = Dst.getValueType();
161 EVT SizeVT = Size.getValueType();
162
163 Chain = DAG.getMemset(Chain, dl,
164 DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
165 DAG.getConstant(Offset, AddrVT)),
166 Src,
167 DAG.getConstant(BytesLeft, SizeVT),
168 Align, isVolatile, DstPtrInfo.getWithOffset(Offset));
169 }
170
171 // TODO: Use a Tokenfactor, as in memcpy, instead of a single chain.
172 return Chain;
173 }
174
175 SDValue
EmitTargetCodeForMemcpy(SelectionDAG & DAG,SDLoc dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,unsigned Align,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const176 X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
177 SDValue Chain, SDValue Dst, SDValue Src,
178 SDValue Size, unsigned Align,
179 bool isVolatile, bool AlwaysInline,
180 MachinePointerInfo DstPtrInfo,
181 MachinePointerInfo SrcPtrInfo) const {
182 // This requires the copy size to be a constant, preferably
183 // within a subtarget-specific limit.
184 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
185 const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
186 if (!ConstantSize)
187 return SDValue();
188 uint64_t SizeVal = ConstantSize->getZExtValue();
189 if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
190 return SDValue();
191
192 /// If not DWORD aligned, it is more efficient to call the library. However
193 /// if calling the library is not allowed (AlwaysInline), then soldier on as
194 /// the code generated here is better than the long load-store sequence we
195 /// would otherwise get.
196 if (!AlwaysInline && (Align & 3) != 0)
197 return SDValue();
198
199 // If to a segment-relative address space, use the default lowering.
200 if (DstPtrInfo.getAddrSpace() >= 256 ||
201 SrcPtrInfo.getAddrSpace() >= 256)
202 return SDValue();
203
204 // ESI might be used as a base pointer, in that case we can't simply overwrite
205 // the register. Fall back to generic code.
206 const X86RegisterInfo *TRI =
207 static_cast<const X86RegisterInfo *>(DAG.getTarget().getRegisterInfo());
208 if (TRI->hasBasePointer(DAG.getMachineFunction()) &&
209 TRI->getBaseRegister() == X86::ESI)
210 return SDValue();
211
212 MVT AVT;
213 if (Align & 1)
214 AVT = MVT::i8;
215 else if (Align & 2)
216 AVT = MVT::i16;
217 else if (Align & 4)
218 // DWORD aligned
219 AVT = MVT::i32;
220 else
221 // QWORD aligned
222 AVT = Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
223
224 unsigned UBytes = AVT.getSizeInBits() / 8;
225 unsigned CountVal = SizeVal / UBytes;
226 SDValue Count = DAG.getIntPtrConstant(CountVal);
227 unsigned BytesLeft = SizeVal % UBytes;
228
229 SDValue InFlag;
230 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX :
231 X86::ECX,
232 Count, InFlag);
233 InFlag = Chain.getValue(1);
234 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI :
235 X86::EDI,
236 Dst, InFlag);
237 InFlag = Chain.getValue(1);
238 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI :
239 X86::ESI,
240 Src, InFlag);
241 InFlag = Chain.getValue(1);
242
243 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
244 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
245 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops);
246
247 SmallVector<SDValue, 4> Results;
248 Results.push_back(RepMovs);
249 if (BytesLeft) {
250 // Handle the last 1 - 7 bytes.
251 unsigned Offset = SizeVal - BytesLeft;
252 EVT DstVT = Dst.getValueType();
253 EVT SrcVT = Src.getValueType();
254 EVT SizeVT = Size.getValueType();
255 Results.push_back(DAG.getMemcpy(Chain, dl,
256 DAG.getNode(ISD::ADD, dl, DstVT, Dst,
257 DAG.getConstant(Offset, DstVT)),
258 DAG.getNode(ISD::ADD, dl, SrcVT, Src,
259 DAG.getConstant(Offset, SrcVT)),
260 DAG.getConstant(BytesLeft, SizeVT),
261 Align, isVolatile, AlwaysInline,
262 DstPtrInfo.getWithOffset(Offset),
263 SrcPtrInfo.getWithOffset(Offset)));
264 }
265
266 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Results);
267 }
268