1; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -tailcallopt | FileCheck %s 2 3declare fastcc void @callee_stack0() 4declare fastcc void @callee_stack8([8 x i32], i64) 5declare fastcc void @callee_stack16([8 x i32], i64, i64) 6 7define fastcc void @caller_to0_from0() nounwind { 8; CHECK-LABEL: caller_to0_from0: 9; CHECK-NEXT: // BB 10 11 tail call fastcc void @callee_stack0() 12 ret void 13 14; CHECK-NEXT: b callee_stack0 15} 16 17define fastcc void @caller_to0_from8([8 x i32], i64) { 18; CHECK-LABEL: caller_to0_from8: 19 20 tail call fastcc void @callee_stack0() 21 ret void 22 23; CHECK: add sp, sp, #16 24; CHECK-NEXT: b callee_stack0 25} 26 27define fastcc void @caller_to8_from0() { 28; CHECK-LABEL: caller_to8_from0: 29; CHECK: sub sp, sp, #32 30 31; Key point is that the "42" should go #16 below incoming stack 32; pointer (we didn't have arg space to reuse). 33 tail call fastcc void @callee_stack8([8 x i32] undef, i64 42) 34 ret void 35 36; CHECK: str {{x[0-9]+}}, [sp, #16]! 37; CHECK-NEXT: b callee_stack8 38} 39 40define fastcc void @caller_to8_from8([8 x i32], i64 %a) { 41; CHECK-LABEL: caller_to8_from8: 42; CHECK: sub sp, sp, #16 43 44; Key point is that the "%a" should go where at SP on entry. 45 tail call fastcc void @callee_stack8([8 x i32] undef, i64 42) 46 ret void 47 48; CHECK: str {{x[0-9]+}}, [sp, #16]! 49; CHECK-NEXT: b callee_stack8 50} 51 52define fastcc void @caller_to16_from8([8 x i32], i64 %a) { 53; CHECK-LABEL: caller_to16_from8: 54; CHECK: sub sp, sp, #16 55 56; Important point is that the call reuses the "dead" argument space 57; above %a on the stack. If it tries to go below incoming-SP then the 58; callee will not deallocate the space, even in fastcc. 59 tail call fastcc void @callee_stack16([8 x i32] undef, i64 42, i64 2) 60 61; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16] 62; CHECK-NEXT: add sp, sp, #16 63; CHECK-NEXT: b callee_stack16 64 ret void 65} 66 67 68define fastcc void @caller_to8_from24([8 x i32], i64 %a, i64 %b, i64 %c) { 69; CHECK-LABEL: caller_to8_from24: 70; CHECK: sub sp, sp, #16 71 72; Key point is that the "%a" should go where at #16 above SP on entry. 73 tail call fastcc void @callee_stack8([8 x i32] undef, i64 42) 74 ret void 75 76; CHECK: str {{x[0-9]+}}, [sp, #32]! 77; CHECK-NEXT: b callee_stack8 78} 79 80 81define fastcc void @caller_to16_from16([8 x i32], i64 %a, i64 %b) { 82; CHECK-LABEL: caller_to16_from16: 83; CHECK: sub sp, sp, #16 84 85; Here we want to make sure that both loads happen before the stores: 86; otherwise either %a or %b will be wrongly clobbered. 87 tail call fastcc void @callee_stack16([8 x i32] undef, i64 %b, i64 %a) 88 ret void 89 90; CHECK: ldp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16] 91; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16] 92; CHECK-NEXT: add sp, sp, #16 93; CHECK-NEXT: b callee_stack16 94} 95