1; Tests for the two-address instruction pass. 2; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 -arm-atomic-cfg-tidy=0 %s -o - | FileCheck %s 3 4define void @PR13378() nounwind { 5; This was orriginally a crasher trying to schedule the instructions. 6; CHECK-LABEL: PR13378: 7; CHECK: vld1.32 8; CHECK-NEXT: vst1.32 9; CHECK-NEXT: vst1.32 10; CHECK-NEXT: vmov.f32 11; CHECK-NEXT: vmov.f32 12; CHECK-NEXT: vst1.32 13 14entry: 15 %0 = load <4 x float>* undef, align 4 16 store <4 x float> zeroinitializer, <4 x float>* undef, align 4 17 store <4 x float> %0, <4 x float>* undef, align 4 18 %1 = insertelement <4 x float> %0, float 1.000000e+00, i32 3 19 store <4 x float> %1, <4 x float>* undef, align 4 20 unreachable 21} 22