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1; RUN: llc < %s -march=ppc32 | \
2; RUN:   grep "b LBB.*" | count 4
3
4target datalayout = "E-p:32:32"
5target triple = "powerpc-apple-darwin8.7.0"
6
7define void @foo(i32 %W, i32 %X, i32 %Y, i32 %Z) {
8entry:
9	%tmp1 = and i32 %W, 1		; <i32> [#uses=1]
10	%tmp1.upgrd.1 = icmp eq i32 %tmp1, 0		; <i1> [#uses=1]
11	br i1 %tmp1.upgrd.1, label %cond_false, label %bb5
12bb:		; preds = %bb5, %bb
13	%indvar77 = phi i32 [ %indvar.next78, %bb ], [ 0, %bb5 ]		; <i32> [#uses=1]
14	%tmp2 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
15	%indvar.next78 = add i32 %indvar77, 1		; <i32> [#uses=2]
16	%exitcond79 = icmp eq i32 %indvar.next78, %X		; <i1> [#uses=1]
17	br i1 %exitcond79, label %cond_next48, label %bb
18bb5:		; preds = %entry
19	%tmp = icmp eq i32 %X, 0		; <i1> [#uses=1]
20	br i1 %tmp, label %cond_next48, label %bb
21cond_false:		; preds = %entry
22	%tmp10 = and i32 %W, 2		; <i32> [#uses=1]
23	%tmp10.upgrd.2 = icmp eq i32 %tmp10, 0		; <i1> [#uses=1]
24	br i1 %tmp10.upgrd.2, label %cond_false20, label %bb16
25bb12:		; preds = %bb16, %bb12
26	%indvar72 = phi i32 [ %indvar.next73, %bb12 ], [ 0, %bb16 ]		; <i32> [#uses=1]
27	%tmp13 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
28	%indvar.next73 = add i32 %indvar72, 1		; <i32> [#uses=2]
29	%exitcond74 = icmp eq i32 %indvar.next73, %Y		; <i1> [#uses=1]
30	br i1 %exitcond74, label %cond_next48, label %bb12
31bb16:		; preds = %cond_false
32	%tmp18 = icmp eq i32 %Y, 0		; <i1> [#uses=1]
33	br i1 %tmp18, label %cond_next48, label %bb12
34cond_false20:		; preds = %cond_false
35	%tmp23 = and i32 %W, 4		; <i32> [#uses=1]
36	%tmp23.upgrd.3 = icmp eq i32 %tmp23, 0		; <i1> [#uses=1]
37	br i1 %tmp23.upgrd.3, label %cond_false33, label %bb29
38bb25:		; preds = %bb29, %bb25
39	%indvar67 = phi i32 [ %indvar.next68, %bb25 ], [ 0, %bb29 ]		; <i32> [#uses=1]
40	%tmp26 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
41	%indvar.next68 = add i32 %indvar67, 1		; <i32> [#uses=2]
42	%exitcond69 = icmp eq i32 %indvar.next68, %Z		; <i1> [#uses=1]
43	br i1 %exitcond69, label %cond_next48, label %bb25
44bb29:		; preds = %cond_false20
45	%tmp31 = icmp eq i32 %Z, 0		; <i1> [#uses=1]
46	br i1 %tmp31, label %cond_next48, label %bb25
47cond_false33:		; preds = %cond_false20
48	%tmp36 = and i32 %W, 8		; <i32> [#uses=1]
49	%tmp36.upgrd.4 = icmp eq i32 %tmp36, 0		; <i1> [#uses=1]
50	br i1 %tmp36.upgrd.4, label %cond_next48, label %bb42
51bb38:		; preds = %bb42
52	%tmp39 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
53	%indvar.next = add i32 %indvar, 1		; <i32> [#uses=1]
54	br label %bb42
55bb42:		; preds = %bb38, %cond_false33
56	%indvar = phi i32 [ %indvar.next, %bb38 ], [ 0, %cond_false33 ]		; <i32> [#uses=4]
57	%W_addr.0 = sub i32 %W, %indvar		; <i32> [#uses=1]
58	%exitcond = icmp eq i32 %indvar, %W		; <i1> [#uses=1]
59	br i1 %exitcond, label %cond_next48, label %bb38
60cond_next48:		; preds = %bb42, %cond_false33, %bb29, %bb25, %bb16, %bb12, %bb5, %bb
61	%W_addr.1 = phi i32 [ %W, %bb5 ], [ %W, %bb16 ], [ %W, %bb29 ], [ %W, %cond_false33 ], [ %W_addr.0, %bb42 ], [ %W, %bb25 ], [ %W, %bb12 ], [ %W, %bb ]		; <i32> [#uses=1]
62	%tmp50 = icmp eq i32 %W_addr.1, 0		; <i1> [#uses=1]
63	br i1 %tmp50, label %UnifiedReturnBlock, label %cond_true51
64cond_true51:		; preds = %cond_next48
65	%tmp52 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
66	ret void
67UnifiedReturnBlock:		; preds = %cond_next48
68	ret void
69}
70
71declare i32 @bar(...)
72