1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64 2; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=970 | FileCheck %s --check-prefix=PPC970 3 4;; Tests for 970 don't use -fast-isel-abort because we intentionally punt 5;; to SelectionDAG in some cases. 6 7; Test sitofp 8 9define void @sitofp_single_i64(i64 %a, float %b) nounwind ssp { 10entry: 11; ELF64: sitofp_single_i64 12; PPC970: sitofp_single_i64 13 %b.addr = alloca float, align 4 14 %conv = sitofp i64 %a to float 15; ELF64: std 16; ELF64: lfd 17; ELF64: fcfids 18; PPC970: std 19; PPC970: lfd 20; PPC970: fcfid 21; PPC970: frsp 22 store float %conv, float* %b.addr, align 4 23 ret void 24} 25 26define void @sitofp_single_i32(i32 %a, float %b) nounwind ssp { 27entry: 28; ELF64: sitofp_single_i32 29; PPC970: sitofp_single_i32 30 %b.addr = alloca float, align 4 31 %conv = sitofp i32 %a to float 32; ELF64: std 33; ELF64: lfiwax 34; ELF64: fcfids 35; PPC970: std 36; PPC970: lfd 37; PPC970: fcfid 38; PPC970: frsp 39 store float %conv, float* %b.addr, align 4 40 ret void 41} 42 43define void @sitofp_single_i16(i16 %a, float %b) nounwind ssp { 44entry: 45; ELF64: sitofp_single_i16 46; PPC970: sitofp_single_i16 47 %b.addr = alloca float, align 4 48 %conv = sitofp i16 %a to float 49; ELF64: extsh 50; ELF64: std 51; ELF64: lfd 52; ELF64: fcfids 53; PPC970: extsh 54; PPC970: std 55; PPC970: lfd 56; PPC970: fcfid 57; PPC970: frsp 58 store float %conv, float* %b.addr, align 4 59 ret void 60} 61 62define void @sitofp_single_i8(i8 %a) nounwind ssp { 63entry: 64; ELF64: sitofp_single_i8 65; PPC970: sitofp_single_i8 66 %b.addr = alloca float, align 4 67 %conv = sitofp i8 %a to float 68; ELF64: extsb 69; ELF64: std 70; ELF64: lfd 71; ELF64: fcfids 72; PPC970: extsb 73; PPC970: std 74; PPC970: lfd 75; PPC970: fcfid 76; PPC970: frsp 77 store float %conv, float* %b.addr, align 4 78 ret void 79} 80 81define void @sitofp_double_i32(i32 %a, double %b) nounwind ssp { 82entry: 83; ELF64: sitofp_double_i32 84; PPC970: sitofp_double_i32 85 %b.addr = alloca double, align 8 86 %conv = sitofp i32 %a to double 87; ELF64: std 88; ELF64: lfiwax 89; ELF64: fcfid 90; PPC970: std 91; PPC970: lfd 92; PPC970: fcfid 93 store double %conv, double* %b.addr, align 8 94 ret void 95} 96 97define void @sitofp_double_i64(i64 %a, double %b) nounwind ssp { 98entry: 99; ELF64: sitofp_double_i64 100; PPC970: sitofp_double_i64 101 %b.addr = alloca double, align 8 102 %conv = sitofp i64 %a to double 103; ELF64: std 104; ELF64: lfd 105; ELF64: fcfid 106; PPC970: std 107; PPC970: lfd 108; PPC970: fcfid 109 store double %conv, double* %b.addr, align 8 110 ret void 111} 112 113define void @sitofp_double_i16(i16 %a, double %b) nounwind ssp { 114entry: 115; ELF64: sitofp_double_i16 116; PPC970: sitofp_double_i16 117 %b.addr = alloca double, align 8 118 %conv = sitofp i16 %a to double 119; ELF64: extsh 120; ELF64: std 121; ELF64: lfd 122; ELF64: fcfid 123; PPC970: extsh 124; PPC970: std 125; PPC970: lfd 126; PPC970: fcfid 127 store double %conv, double* %b.addr, align 8 128 ret void 129} 130 131define void @sitofp_double_i8(i8 %a, double %b) nounwind ssp { 132entry: 133; ELF64: sitofp_double_i8 134; PPC970: sitofp_double_i8 135 %b.addr = alloca double, align 8 136 %conv = sitofp i8 %a to double 137; ELF64: extsb 138; ELF64: std 139; ELF64: lfd 140; ELF64: fcfid 141; PPC970: extsb 142; PPC970: std 143; PPC970: lfd 144; PPC970: fcfid 145 store double %conv, double* %b.addr, align 8 146 ret void 147} 148 149; Test uitofp 150 151define void @uitofp_single_i64(i64 %a, float %b) nounwind ssp { 152entry: 153; ELF64: uitofp_single_i64 154; PPC970: uitofp_single_i64 155 %b.addr = alloca float, align 4 156 %conv = uitofp i64 %a to float 157; ELF64: std 158; ELF64: lfd 159; ELF64: fcfidus 160; PPC970-NOT: fcfidus 161 store float %conv, float* %b.addr, align 4 162 ret void 163} 164 165define void @uitofp_single_i32(i32 %a, float %b) nounwind ssp { 166entry: 167; ELF64: uitofp_single_i32 168; PPC970: uitofp_single_i32 169 %b.addr = alloca float, align 4 170 %conv = uitofp i32 %a to float 171; ELF64: std 172; ELF64: lfiwzx 173; ELF64: fcfidus 174; PPC970-NOT: lfiwzx 175; PPC970-NOT: fcfidus 176 store float %conv, float* %b.addr, align 4 177 ret void 178} 179 180define void @uitofp_single_i16(i16 %a, float %b) nounwind ssp { 181entry: 182; ELF64: uitofp_single_i16 183; PPC970: uitofp_single_i16 184 %b.addr = alloca float, align 4 185 %conv = uitofp i16 %a to float 186; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48 187; ELF64: std 188; ELF64: lfd 189; ELF64: fcfidus 190; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 16, 31 191; PPC970: std 192; PPC970: lfd 193; PPC970: fcfid 194; PPC970: frsp 195 store float %conv, float* %b.addr, align 4 196 ret void 197} 198 199define void @uitofp_single_i8(i8 %a) nounwind ssp { 200entry: 201; ELF64: uitofp_single_i8 202; PPC970: uitofp_single_i8 203 %b.addr = alloca float, align 4 204 %conv = uitofp i8 %a to float 205; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56 206; ELF64: std 207; ELF64: lfd 208; ELF64: fcfidus 209; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 24, 31 210; PPC970: std 211; PPC970: lfd 212; PPC970: fcfid 213; PPC970: frsp 214 store float %conv, float* %b.addr, align 4 215 ret void 216} 217 218define void @uitofp_double_i64(i64 %a, double %b) nounwind ssp { 219entry: 220; ELF64: uitofp_double_i64 221; PPC970: uitofp_double_i64 222 %b.addr = alloca double, align 8 223 %conv = uitofp i64 %a to double 224; ELF64: std 225; ELF64: lfd 226; ELF64: fcfidu 227; PPC970-NOT: fcfidu 228 store double %conv, double* %b.addr, align 8 229 ret void 230} 231 232define void @uitofp_double_i32(i32 %a, double %b) nounwind ssp { 233entry: 234; ELF64: uitofp_double_i32 235; PPC970: uitofp_double_i32 236 %b.addr = alloca double, align 8 237 %conv = uitofp i32 %a to double 238; ELF64: std 239; ELF64: lfiwzx 240; ELF64: fcfidu 241; PPC970-NOT: lfiwzx 242; PPC970-NOT: fcfidu 243 store double %conv, double* %b.addr, align 8 244 ret void 245} 246 247define void @uitofp_double_i16(i16 %a, double %b) nounwind ssp { 248entry: 249; ELF64: uitofp_double_i16 250; PPC970: uitofp_double_i16 251 %b.addr = alloca double, align 8 252 %conv = uitofp i16 %a to double 253; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48 254; ELF64: std 255; ELF64: lfd 256; ELF64: fcfidu 257; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 16, 31 258; PPC970: std 259; PPC970: lfd 260; PPC970: fcfid 261 store double %conv, double* %b.addr, align 8 262 ret void 263} 264 265define void @uitofp_double_i8(i8 %a, double %b) nounwind ssp { 266entry: 267; ELF64: uitofp_double_i8 268; PPC970: uitofp_double_i8 269 %b.addr = alloca double, align 8 270 %conv = uitofp i8 %a to double 271; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56 272; ELF64: std 273; ELF64: lfd 274; ELF64: fcfidu 275; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 24, 31 276; PPC970: std 277; PPC970: lfd 278; PPC970: fcfid 279 store double %conv, double* %b.addr, align 8 280 ret void 281} 282 283; Test fptosi 284 285define void @fptosi_float_i32(float %a) nounwind ssp { 286entry: 287; ELF64: fptosi_float_i32 288; PPC970: fptosi_float_i32 289 %b.addr = alloca i32, align 4 290 %conv = fptosi float %a to i32 291; ELF64: fctiwz 292; ELF64: stfd 293; ELF64: lwa 294; PPC970: fctiwz 295; PPC970: stfd 296; PPC970: lwa 297 store i32 %conv, i32* %b.addr, align 4 298 ret void 299} 300 301define void @fptosi_float_i64(float %a) nounwind ssp { 302entry: 303; ELF64: fptosi_float_i64 304; PPC970: fptosi_float_i64 305 %b.addr = alloca i64, align 4 306 %conv = fptosi float %a to i64 307; ELF64: fctidz 308; ELF64: stfd 309; ELF64: ld 310; PPC970: fctidz 311; PPC970: stfd 312; PPC970: ld 313 store i64 %conv, i64* %b.addr, align 4 314 ret void 315} 316 317define void @fptosi_double_i32(double %a) nounwind ssp { 318entry: 319; ELF64: fptosi_double_i32 320; PPC970: fptosi_double_i32 321 %b.addr = alloca i32, align 8 322 %conv = fptosi double %a to i32 323; ELF64: fctiwz 324; ELF64: stfd 325; ELF64: lwa 326; PPC970: fctiwz 327; PPC970: stfd 328; PPC970: lwa 329 store i32 %conv, i32* %b.addr, align 8 330 ret void 331} 332 333define void @fptosi_double_i64(double %a) nounwind ssp { 334entry: 335; ELF64: fptosi_double_i64 336; PPC970: fptosi_double_i64 337 %b.addr = alloca i64, align 8 338 %conv = fptosi double %a to i64 339; ELF64: fctidz 340; ELF64: stfd 341; ELF64: ld 342; PPC970: fctidz 343; PPC970: stfd 344; PPC970: ld 345 store i64 %conv, i64* %b.addr, align 8 346 ret void 347} 348 349; Test fptoui 350 351define void @fptoui_float_i32(float %a) nounwind ssp { 352entry: 353; ELF64: fptoui_float_i32 354; PPC970: fptoui_float_i32 355 %b.addr = alloca i32, align 4 356 %conv = fptoui float %a to i32 357; ELF64: fctiwuz 358; ELF64: stfd 359; ELF64: lwz 360; PPC970: fctidz 361; PPC970: stfd 362; PPC970: lwz 363 store i32 %conv, i32* %b.addr, align 4 364 ret void 365} 366 367define void @fptoui_float_i64(float %a) nounwind ssp { 368entry: 369; ELF64: fptoui_float_i64 370; PPC970: fptoui_float_i64 371 %b.addr = alloca i64, align 4 372 %conv = fptoui float %a to i64 373; ELF64: fctiduz 374; ELF64: stfd 375; ELF64: ld 376; PPC970-NOT: fctiduz 377 store i64 %conv, i64* %b.addr, align 4 378 ret void 379} 380 381define void @fptoui_double_i32(double %a) nounwind ssp { 382entry: 383; ELF64: fptoui_double_i32 384; PPC970: fptoui_double_i32 385 %b.addr = alloca i32, align 8 386 %conv = fptoui double %a to i32 387; ELF64: fctiwuz 388; ELF64: stfd 389; ELF64: lwz 390; PPC970: fctidz 391; PPC970: stfd 392; PPC970: lwz 393 store i32 %conv, i32* %b.addr, align 8 394 ret void 395} 396 397define void @fptoui_double_i64(double %a) nounwind ssp { 398entry: 399; ELF64: fptoui_double_i64 400; PPC970: fptoui_double_i64 401 %b.addr = alloca i64, align 8 402 %conv = fptoui double %a to i64 403; ELF64: fctiduz 404; ELF64: stfd 405; ELF64: ld 406; PPC970-NOT: fctiduz 407 store i64 %conv, i64* %b.addr, align 8 408 ret void 409} 410