1 /*
2 * Copyright (C) 2010 The Android Open Source Project
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in
12 * the documentation and/or other materials provided with the
13 * distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /* ChangeLog for this library:
30 *
31 * NDK r8d: Add android_setCpu().
32 *
33 * NDK r8c: Add new ARM CPU features: VFPv2, VFP_D32, VFP_FP16,
34 * VFP_FMA, NEON_FMA, IDIV_ARM, IDIV_THUMB2 and iWMMXt.
35 *
36 * Rewrite the code to parse /proc/self/auxv instead of
37 * the "Features" field in /proc/cpuinfo.
38 *
39 * Dynamically allocate the buffer that hold the content
40 * of /proc/cpuinfo to deal with newer hardware.
41 *
42 * NDK r7c: Fix CPU count computation. The old method only reported the
43 * number of _active_ CPUs when the library was initialized,
44 * which could be less than the real total.
45 *
46 * NDK r5: Handle buggy kernels which report a CPU Architecture number of 7
47 * for an ARMv6 CPU (see below).
48 *
49 * Handle kernels that only report 'neon', and not 'vfpv3'
50 * (VFPv3 is mandated by the ARM architecture is Neon is implemented)
51 *
52 * Handle kernels that only report 'vfpv3d16', and not 'vfpv3'
53 *
54 * Fix x86 compilation. Report ANDROID_CPU_FAMILY_X86 in
55 * android_getCpuFamily().
56 *
57 * NDK r4: Initial release
58 */
59 #include <sys/system_properties.h>
60 #ifdef __arm__
61 #include <machine/cpu-features.h>
62 #endif
63 #include <pthread.h>
64 #include "cpu-features.h"
65 #include <stdio.h>
66 #include <stdlib.h>
67 #include <fcntl.h>
68 #include <errno.h>
69
70 static pthread_once_t g_once;
71 static int g_inited;
72 static AndroidCpuFamily g_cpuFamily;
73 static uint64_t g_cpuFeatures;
74 static int g_cpuCount;
75
76 static const int android_cpufeatures_debug = 0;
77
78 #ifdef __arm__
79 # define DEFAULT_CPU_FAMILY ANDROID_CPU_FAMILY_ARM
80 #elif defined __i386__
81 # define DEFAULT_CPU_FAMILY ANDROID_CPU_FAMILY_X86
82 #else
83 # define DEFAULT_CPU_FAMILY ANDROID_CPU_FAMILY_UNKNOWN
84 #endif
85
86 #define D(...) \
87 do { \
88 if (android_cpufeatures_debug) { \
89 printf(__VA_ARGS__); fflush(stdout); \
90 } \
91 } while (0)
92
93 #ifdef __i386__
x86_cpuid(int func,int values[4])94 static __inline__ void x86_cpuid(int func, int values[4])
95 {
96 int a, b, c, d;
97 /* We need to preserve ebx since we're compiling PIC code */
98 /* this means we can't use "=b" for the second output register */
99 __asm__ __volatile__ ( \
100 "push %%ebx\n"
101 "cpuid\n" \
102 "mov %%ebx, %1\n"
103 "pop %%ebx\n"
104 : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
105 : "a" (func) \
106 );
107 values[0] = a;
108 values[1] = b;
109 values[2] = c;
110 values[3] = d;
111 }
112 #endif
113
114 /* Get the size of a file by reading it until the end. This is needed
115 * because files under /proc do not always return a valid size when
116 * using fseek(0, SEEK_END) + ftell(). Nor can they be mmap()-ed.
117 */
118 static int
get_file_size(const char * pathname)119 get_file_size(const char* pathname)
120 {
121 int fd, ret, result = 0;
122 char buffer[256];
123
124 fd = open(pathname, O_RDONLY);
125 if (fd < 0) {
126 D("Can't open %s: %s\n", pathname, strerror(errno));
127 return -1;
128 }
129
130 for (;;) {
131 int ret = read(fd, buffer, sizeof buffer);
132 if (ret < 0) {
133 if (errno == EINTR)
134 continue;
135 D("Error while reading %s: %s\n", pathname, strerror(errno));
136 break;
137 }
138 if (ret == 0)
139 break;
140
141 result += ret;
142 }
143 close(fd);
144 return result;
145 }
146
147 /* Read the content of /proc/cpuinfo into a user-provided buffer.
148 * Return the length of the data, or -1 on error. Does *not*
149 * zero-terminate the content. Will not read more
150 * than 'buffsize' bytes.
151 */
152 static int
read_file(const char * pathname,char * buffer,size_t buffsize)153 read_file(const char* pathname, char* buffer, size_t buffsize)
154 {
155 int fd, count;
156
157 fd = open(pathname, O_RDONLY);
158 if (fd < 0) {
159 D("Could not open %s: %s\n", pathname, strerror(errno));
160 return -1;
161 }
162 count = 0;
163 while (count < (int)buffsize) {
164 int ret = read(fd, buffer + count, buffsize - count);
165 if (ret < 0) {
166 if (errno == EINTR)
167 continue;
168 D("Error while reading from %s: %s\n", pathname, strerror(errno));
169 if (count == 0)
170 count = -1;
171 break;
172 }
173 if (ret == 0)
174 break;
175 count += ret;
176 }
177 close(fd);
178 return count;
179 }
180
181 /* Extract the content of a the first occurence of a given field in
182 * the content of /proc/cpuinfo and return it as a heap-allocated
183 * string that must be freed by the caller.
184 *
185 * Return NULL if not found
186 */
187 static char*
extract_cpuinfo_field(char * buffer,int buflen,const char * field)188 extract_cpuinfo_field(char* buffer, int buflen, const char* field)
189 {
190 int fieldlen = strlen(field);
191 char* bufend = buffer + buflen;
192 char* result = NULL;
193 int len, ignore;
194 const char *p, *q;
195
196 /* Look for first field occurence, and ensures it starts the line. */
197 p = buffer;
198 bufend = buffer + buflen;
199 for (;;) {
200 p = memmem(p, bufend-p, field, fieldlen);
201 if (p == NULL)
202 goto EXIT;
203
204 if (p == buffer || p[-1] == '\n')
205 break;
206
207 p += fieldlen;
208 }
209
210 /* Skip to the first column followed by a space */
211 p += fieldlen;
212 p = memchr(p, ':', bufend-p);
213 if (p == NULL || p[1] != ' ')
214 goto EXIT;
215
216 /* Find the end of the line */
217 p += 2;
218 q = memchr(p, '\n', bufend-p);
219 if (q == NULL)
220 q = bufend;
221
222 /* Copy the line into a heap-allocated buffer */
223 len = q-p;
224 result = malloc(len+1);
225 if (result == NULL)
226 goto EXIT;
227
228 memcpy(result, p, len);
229 result[len] = '\0';
230
231 EXIT:
232 return result;
233 }
234
235 /* Like strlen(), but for constant string literals */
236 #define STRLEN_CONST(x) ((sizeof(x)-1)
237
238
239 /* Checks that a space-separated list of items contains one given 'item'.
240 * Returns 1 if found, 0 otherwise.
241 */
242 static int
has_list_item(const char * list,const char * item)243 has_list_item(const char* list, const char* item)
244 {
245 const char* p = list;
246 int itemlen = strlen(item);
247
248 if (list == NULL)
249 return 0;
250
251 while (*p) {
252 const char* q;
253
254 /* skip spaces */
255 while (*p == ' ' || *p == '\t')
256 p++;
257
258 /* find end of current list item */
259 q = p;
260 while (*q && *q != ' ' && *q != '\t')
261 q++;
262
263 if (itemlen == q-p && !memcmp(p, item, itemlen))
264 return 1;
265
266 /* skip to next item */
267 p = q;
268 }
269 return 0;
270 }
271
272 /* Parse an decimal integer starting from 'input', but not going further
273 * than 'limit'. Return the value into '*result'.
274 *
275 * NOTE: Does not skip over leading spaces, or deal with sign characters.
276 * NOTE: Ignores overflows.
277 *
278 * The function returns NULL in case of error (bad format), or the new
279 * position after the decimal number in case of success (which will always
280 * be <= 'limit').
281 */
282 static const char*
parse_decimal(const char * input,const char * limit,int * result)283 parse_decimal(const char* input, const char* limit, int* result)
284 {
285 const char* p = input;
286 int val = 0;
287 while (p < limit) {
288 int d = (*p - '0');
289 if ((unsigned)d >= 10U)
290 break;
291 val = val*10 + d;
292 p++;
293 }
294 if (p == input)
295 return NULL;
296
297 *result = val;
298 return p;
299 }
300
301 /* This small data type is used to represent a CPU list / mask, as read
302 * from sysfs on Linux. See http://www.kernel.org/doc/Documentation/cputopology.txt
303 *
304 * For now, we don't expect more than 32 cores on mobile devices, so keep
305 * everything simple.
306 */
307 typedef struct {
308 uint32_t mask;
309 } CpuList;
310
311 static __inline__ void
cpulist_init(CpuList * list)312 cpulist_init(CpuList* list) {
313 list->mask = 0;
314 }
315
316 static __inline__ void
cpulist_and(CpuList * list1,CpuList * list2)317 cpulist_and(CpuList* list1, CpuList* list2) {
318 list1->mask &= list2->mask;
319 }
320
321 static __inline__ void
cpulist_set(CpuList * list,int index)322 cpulist_set(CpuList* list, int index) {
323 if ((unsigned)index < 32) {
324 list->mask |= (uint32_t)(1U << index);
325 }
326 }
327
328 static __inline__ int
cpulist_count(CpuList * list)329 cpulist_count(CpuList* list) {
330 return __builtin_popcount(list->mask);
331 }
332
333 /* Parse a textual list of cpus and store the result inside a CpuList object.
334 * Input format is the following:
335 * - comma-separated list of items (no spaces)
336 * - each item is either a single decimal number (cpu index), or a range made
337 * of two numbers separated by a single dash (-). Ranges are inclusive.
338 *
339 * Examples: 0
340 * 2,4-127,128-143
341 * 0-1
342 */
343 static void
cpulist_parse(CpuList * list,const char * line,int line_len)344 cpulist_parse(CpuList* list, const char* line, int line_len)
345 {
346 const char* p = line;
347 const char* end = p + line_len;
348 const char* q;
349
350 /* NOTE: the input line coming from sysfs typically contains a
351 * trailing newline, so take care of it in the code below
352 */
353 while (p < end && *p != '\n')
354 {
355 int val, start_value, end_value;
356
357 /* Find the end of current item, and put it into 'q' */
358 q = memchr(p, ',', end-p);
359 if (q == NULL) {
360 q = end;
361 }
362
363 /* Get first value */
364 p = parse_decimal(p, q, &start_value);
365 if (p == NULL)
366 goto BAD_FORMAT;
367
368 end_value = start_value;
369
370 /* If we're not at the end of the item, expect a dash and
371 * and integer; extract end value.
372 */
373 if (p < q && *p == '-') {
374 p = parse_decimal(p+1, q, &end_value);
375 if (p == NULL)
376 goto BAD_FORMAT;
377 }
378
379 /* Set bits CPU list bits */
380 for (val = start_value; val <= end_value; val++) {
381 cpulist_set(list, val);
382 }
383
384 /* Jump to next item */
385 p = q;
386 if (p < end)
387 p++;
388 }
389
390 BAD_FORMAT:
391 ;
392 }
393
394 /* Read a CPU list from one sysfs file */
395 static void
cpulist_read_from(CpuList * list,const char * filename)396 cpulist_read_from(CpuList* list, const char* filename)
397 {
398 char file[64];
399 int filelen;
400
401 cpulist_init(list);
402
403 filelen = read_file(filename, file, sizeof file);
404 if (filelen < 0) {
405 D("Could not read %s: %s\n", filename, strerror(errno));
406 return;
407 }
408
409 cpulist_parse(list, file, filelen);
410 }
411
412 // See <asm/hwcap.h> kernel header.
413 #define HWCAP_VFP (1 << 6)
414 #define HWCAP_IWMMXT (1 << 9)
415 #define HWCAP_NEON (1 << 12)
416 #define HWCAP_VFPv3 (1 << 13)
417 #define HWCAP_VFPv3D16 (1 << 14)
418 #define HWCAP_VFPv4 (1 << 16)
419 #define HWCAP_IDIVA (1 << 17)
420 #define HWCAP_IDIVT (1 << 18)
421
422 #define AT_HWCAP 16
423
424 /* Read the ELF HWCAP flags by parsing /proc/self/auxv
425 */
426 static uint32_t
get_elf_hwcap(void)427 get_elf_hwcap(void)
428 {
429 uint32_t result = 0;
430 const char filepath[] = "/proc/self/auxv";
431 int fd = open(filepath, O_RDONLY);
432 if (fd < 0) {
433 D("Could not open %s: %s\n", filepath, strerror(errno));
434 return 0;
435 }
436
437 struct { uint32_t tag; uint32_t value; } entry;
438
439 for (;;) {
440 int ret = read(fd, (char*)&entry, sizeof entry);
441 if (ret < 0) {
442 if (errno == EINTR)
443 continue;
444 D("Error while reading %s: %s\n", filepath, strerror(errno));
445 break;
446 }
447 // Detect end of list.
448 if (ret == 0 || (entry.tag == 0 && entry.value == 0))
449 break;
450 if (entry.tag == AT_HWCAP) {
451 result = entry.value;
452 break;
453 }
454 }
455 close(fd);
456 return result;
457 }
458
459 /* Return the number of cpus present on a given device.
460 *
461 * To handle all weird kernel configurations, we need to compute the
462 * intersection of the 'present' and 'possible' CPU lists and count
463 * the result.
464 */
465 static int
get_cpu_count(void)466 get_cpu_count(void)
467 {
468 CpuList cpus_present[1];
469 CpuList cpus_possible[1];
470
471 cpulist_read_from(cpus_present, "/sys/devices/system/cpu/present");
472 cpulist_read_from(cpus_possible, "/sys/devices/system/cpu/possible");
473
474 /* Compute the intersection of both sets to get the actual number of
475 * CPU cores that can be used on this device by the kernel.
476 */
477 cpulist_and(cpus_present, cpus_possible);
478
479 return cpulist_count(cpus_present);
480 }
481
482 static void
android_cpuInitFamily(void)483 android_cpuInitFamily(void)
484 {
485 #if defined(__ARM_ARCH__)
486 g_cpuFamily = ANDROID_CPU_FAMILY_ARM;
487 #elif defined(__i386__)
488 g_cpuFamily = ANDROID_CPU_FAMILY_X86;
489 #elif defined(_MIPS_ARCH)
490 g_cpuFamily = ANDROID_CPU_FAMILY_MIPS;
491 #else
492 g_cpuFamily = ANDROID_CPU_FAMILY_UNKNOWN;
493 #endif
494 }
495
496 static void
android_cpuInit(void)497 android_cpuInit(void)
498 {
499 char* cpuinfo = NULL;
500 int cpuinfo_len;
501
502 android_cpuInitFamily();
503
504 g_cpuFeatures = 0;
505 g_cpuCount = 1;
506 g_inited = 1;
507
508 cpuinfo_len = get_file_size("/proc/cpuinfo");
509 if (cpuinfo_len < 0) {
510 D("cpuinfo_len cannot be computed!");
511 return;
512 }
513 cpuinfo = malloc(cpuinfo_len);
514 if (cpuinfo == NULL) {
515 D("cpuinfo buffer could not be allocated");
516 return;
517 }
518 cpuinfo_len = read_file("/proc/cpuinfo", cpuinfo, cpuinfo_len);
519 D("cpuinfo_len is (%d):\n%.*s\n", cpuinfo_len,
520 cpuinfo_len >= 0 ? cpuinfo_len : 0, cpuinfo);
521
522 if (cpuinfo_len < 0) /* should not happen */ {
523 free(cpuinfo);
524 return;
525 }
526
527 /* Count the CPU cores, the value may be 0 for single-core CPUs */
528 g_cpuCount = get_cpu_count();
529 if (g_cpuCount == 0) {
530 g_cpuCount = 1;
531 }
532
533 D("found cpuCount = %d\n", g_cpuCount);
534
535 #ifdef __ARM_ARCH__
536 {
537 char* features = NULL;
538 char* architecture = NULL;
539
540 /* Extract architecture from the "CPU Architecture" field.
541 * The list is well-known, unlike the the output of
542 * the 'Processor' field which can vary greatly.
543 *
544 * See the definition of the 'proc_arch' array in
545 * $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in
546 * same file.
547 */
548 char* cpuArch = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "CPU architecture");
549
550 if (cpuArch != NULL) {
551 char* end;
552 long archNumber;
553 int hasARMv7 = 0;
554
555 D("found cpuArch = '%s'\n", cpuArch);
556
557 /* read the initial decimal number, ignore the rest */
558 archNumber = strtol(cpuArch, &end, 10);
559
560 /* Here we assume that ARMv8 will be upwards compatible with v7
561 * in the future. Unfortunately, there is no 'Features' field to
562 * indicate that Thumb-2 is supported.
563 */
564 if (end > cpuArch && archNumber >= 7) {
565 hasARMv7 = 1;
566 }
567
568 /* Unfortunately, it seems that certain ARMv6-based CPUs
569 * report an incorrect architecture number of 7!
570 *
571 * See http://code.google.com/p/android/issues/detail?id=10812
572 *
573 * We try to correct this by looking at the 'elf_format'
574 * field reported by the 'Processor' field, which is of the
575 * form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for
576 * an ARMv6-one.
577 */
578 if (hasARMv7) {
579 char* cpuProc = extract_cpuinfo_field(cpuinfo, cpuinfo_len,
580 "Processor");
581 if (cpuProc != NULL) {
582 D("found cpuProc = '%s'\n", cpuProc);
583 if (has_list_item(cpuProc, "(v6l)")) {
584 D("CPU processor and architecture mismatch!!\n");
585 hasARMv7 = 0;
586 }
587 free(cpuProc);
588 }
589 }
590
591 if (hasARMv7) {
592 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_ARMv7;
593 }
594
595 /* The LDREX / STREX instructions are available from ARMv6 */
596 if (archNumber >= 6) {
597 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_LDREX_STREX;
598 }
599
600 free(cpuArch);
601 }
602
603 /* Extract the list of CPU features from ELF hwcaps */
604 uint32_t hwcaps = get_elf_hwcap();
605
606 if (hwcaps != 0) {
607 int has_vfp = (hwcaps & HWCAP_VFP);
608 int has_vfpv3 = (hwcaps & HWCAP_VFPv3);
609 int has_vfpv3d16 = (hwcaps & HWCAP_VFPv3D16);
610 int has_vfpv4 = (hwcaps & HWCAP_VFPv4);
611 int has_neon = (hwcaps & HWCAP_NEON);
612 int has_idiva = (hwcaps & HWCAP_IDIVA);
613 int has_idivt = (hwcaps & HWCAP_IDIVT);
614 int has_iwmmxt = (hwcaps & HWCAP_IWMMXT);
615
616 // The kernel does a poor job at ensuring consistency when
617 // describing CPU features. So lots of guessing is needed.
618
619 // 'vfpv4' implies VFPv3|VFP_FMA|FP16
620 if (has_vfpv4)
621 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3 |
622 ANDROID_CPU_ARM_FEATURE_VFP_FP16 |
623 ANDROID_CPU_ARM_FEATURE_VFP_FMA;
624
625 // 'vfpv3' or 'vfpv3d16' imply VFPv3. Note that unlike GCC,
626 // a value of 'vfpv3' doesn't necessarily mean that the D32
627 // feature is present, so be conservative. All CPUs in the
628 // field that support D32 also support NEON, so this should
629 // not be a problem in practice.
630 if (has_vfpv3 || has_vfpv3d16)
631 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3;
632
633 // 'vfp' is super ambiguous. Depending on the kernel, it can
634 // either mean VFPv2 or VFPv3. Make it depend on ARMv7.
635 if (has_vfp) {
636 if (g_cpuFeatures & ANDROID_CPU_ARM_FEATURE_ARMv7)
637 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3;
638 else
639 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2;
640 }
641
642 // Neon implies VFPv3|D32, and if vfpv4 is detected, NEON_FMA
643 if (has_neon) {
644 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3 |
645 ANDROID_CPU_ARM_FEATURE_NEON |
646 ANDROID_CPU_ARM_FEATURE_VFP_D32;
647 if (has_vfpv4)
648 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_NEON_FMA;
649 }
650
651 // VFPv3 implies VFPv2 and ARMv7
652 if (g_cpuFeatures & ANDROID_CPU_ARM_FEATURE_VFPv3)
653 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2 |
654 ANDROID_CPU_ARM_FEATURE_ARMv7;
655
656 // Note that some buggy kernels do not report these even when
657 // the CPU actually support the division instructions. However,
658 // assume that if 'vfpv4' is detected, then the CPU supports
659 // sdiv/udiv properly.
660 if (has_idiva || has_vfpv4)
661 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_ARM;
662 if (has_idivt || has_vfpv4)
663 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2;
664
665 if (has_iwmmxt)
666 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_iWMMXt;
667 }
668 }
669 #endif /* __ARM_ARCH__ */
670
671 #ifdef __i386__
672 int regs[4];
673
674 /* According to http://en.wikipedia.org/wiki/CPUID */
675 #define VENDOR_INTEL_b 0x756e6547
676 #define VENDOR_INTEL_c 0x6c65746e
677 #define VENDOR_INTEL_d 0x49656e69
678
679 x86_cpuid(0, regs);
680 int vendorIsIntel = (regs[1] == VENDOR_INTEL_b &&
681 regs[2] == VENDOR_INTEL_c &&
682 regs[3] == VENDOR_INTEL_d);
683
684 x86_cpuid(1, regs);
685 if ((regs[2] & (1 << 9)) != 0) {
686 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSSE3;
687 }
688 if ((regs[2] & (1 << 23)) != 0) {
689 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_POPCNT;
690 }
691 if (vendorIsIntel && (regs[2] & (1 << 22)) != 0) {
692 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_MOVBE;
693 }
694 #endif
695
696 free(cpuinfo);
697 }
698
699
700 AndroidCpuFamily
android_getCpuFamily(void)701 android_getCpuFamily(void)
702 {
703 pthread_once(&g_once, android_cpuInit);
704 return g_cpuFamily;
705 }
706
707
708 uint64_t
android_getCpuFeatures(void)709 android_getCpuFeatures(void)
710 {
711 pthread_once(&g_once, android_cpuInit);
712 return g_cpuFeatures;
713 }
714
715
716 int
android_getCpuCount(void)717 android_getCpuCount(void)
718 {
719 pthread_once(&g_once, android_cpuInit);
720 return g_cpuCount;
721 }
722
723 static void
android_cpuInitDummy(void)724 android_cpuInitDummy(void)
725 {
726 g_inited = 1;
727 }
728
729 int
android_setCpu(int cpu_count,uint64_t cpu_features)730 android_setCpu(int cpu_count, uint64_t cpu_features)
731 {
732 /* Fail if the library was already initialized. */
733 if (g_inited)
734 return 0;
735
736 android_cpuInitFamily();
737 g_cpuCount = (cpu_count <= 0 ? 1 : cpu_count);
738 g_cpuFeatures = cpu_features;
739 pthread_once(&g_once, android_cpuInitDummy);
740
741 return 1;
742 }
743
744 /*
745 * Technical note: Making sense of ARM's FPU architecture versions.
746 *
747 * FPA was ARM's first attempt at an FPU architecture. There is no Android
748 * device that actually uses it since this technology was already obsolete
749 * when the project started. If you see references to FPA instructions
750 * somewhere, you can be sure that this doesn't apply to Android at all.
751 *
752 * FPA was followed by "VFP", soon renamed "VFPv1" due to the emergence of
753 * new versions / additions to it. ARM considers this obsolete right now,
754 * and no known Android device implements it either.
755 *
756 * VFPv2 added a few instructions to VFPv1, and is an *optional* extension
757 * supported by some ARMv5TE, ARMv6 and ARMv6T2 CPUs. Note that a device
758 * supporting the 'armeabi' ABI doesn't necessarily support these.
759 *
760 * VFPv3-D16 adds a few instructions on top of VFPv2 and is typically used
761 * on ARMv7-A CPUs which implement a FPU. Note that it is also mandated
762 * by the Android 'armeabi-v7a' ABI. The -D16 suffix in its name means
763 * that it provides 16 double-precision FPU registers (d0-d15) and 32
764 * single-precision ones (s0-s31) which happen to be mapped to the same
765 * register banks.
766 *
767 * VFPv3-D32 is the name of an extension to VFPv3-D16 that provides 16
768 * additional double precision registers (d16-d31). Note that there are
769 * still only 32 single precision registers.
770 *
771 * VFPv3xD is a *subset* of VFPv3-D16 that only provides single-precision
772 * registers. It is only used on ARMv7-M (i.e. on micro-controllers) which
773 * are not supported by Android. Note that it is not compatible with VFPv2.
774 *
775 * NOTE: The term 'VFPv3' usually designate either VFPv3-D16 or VFPv3-D32
776 * depending on context. For example GCC uses it for VFPv3-D32, but
777 * the Linux kernel code uses it for VFPv3-D16 (especially in
778 * /proc/cpuinfo). Always try to use the full designation when
779 * possible.
780 *
781 * NEON, a.k.a. "ARM Advanced SIMD" is an extension that provides
782 * instructions to perform parallel computations on vectors of 8, 16,
783 * 32, 64 and 128 bit quantities. NEON requires VFPv32-D32 since all
784 * NEON registers are also mapped to the same register banks.
785 *
786 * VFPv4-D16, adds a few instructions on top of VFPv3-D16 in order to
787 * perform fused multiply-accumulate on VFP registers, as well as
788 * half-precision (16-bit) conversion operations.
789 *
790 * VFPv4-D32 is VFPv4-D16 with 32, instead of 16, FPU double precision
791 * registers.
792 *
793 * VPFv4-NEON is VFPv4-D32 with NEON instructions. It also adds fused
794 * multiply-accumulate instructions that work on the NEON registers.
795 *
796 * NOTE: Similarly, "VFPv4" might either reference VFPv4-D16 or VFPv4-D32
797 * depending on context.
798 *
799 * The following information was determined by scanning the binutils-2.22
800 * sources:
801 *
802 * Basic VFP instruction subsets:
803 *
804 * #define FPU_VFP_EXT_V1xD 0x08000000 // Base VFP instruction set.
805 * #define FPU_VFP_EXT_V1 0x04000000 // Double-precision insns.
806 * #define FPU_VFP_EXT_V2 0x02000000 // ARM10E VFPr1.
807 * #define FPU_VFP_EXT_V3xD 0x01000000 // VFPv3 single-precision.
808 * #define FPU_VFP_EXT_V3 0x00800000 // VFPv3 double-precision.
809 * #define FPU_NEON_EXT_V1 0x00400000 // Neon (SIMD) insns.
810 * #define FPU_VFP_EXT_D32 0x00200000 // Registers D16-D31.
811 * #define FPU_VFP_EXT_FP16 0x00100000 // Half-precision extensions.
812 * #define FPU_NEON_EXT_FMA 0x00080000 // Neon fused multiply-add
813 * #define FPU_VFP_EXT_FMA 0x00040000 // VFP fused multiply-add
814 *
815 * FPU types (excluding NEON)
816 *
817 * FPU_VFP_V1xD (EXT_V1xD)
818 * |
819 * +--------------------------+
820 * | |
821 * FPU_VFP_V1 (+EXT_V1) FPU_VFP_V3xD (+EXT_V2+EXT_V3xD)
822 * | |
823 * | |
824 * FPU_VFP_V2 (+EXT_V2) FPU_VFP_V4_SP_D16 (+EXT_FP16+EXT_FMA)
825 * |
826 * FPU_VFP_V3D16 (+EXT_Vx3D+EXT_V3)
827 * |
828 * +--------------------------+
829 * | |
830 * FPU_VFP_V3 (+EXT_D32) FPU_VFP_V4D16 (+EXT_FP16+EXT_FMA)
831 * | |
832 * | FPU_VFP_V4 (+EXT_D32)
833 * |
834 * FPU_VFP_HARD (+EXT_FMA+NEON_EXT_FMA)
835 *
836 * VFP architectures:
837 *
838 * ARCH_VFP_V1xD (EXT_V1xD)
839 * |
840 * +------------------+
841 * | |
842 * | ARCH_VFP_V3xD (+EXT_V2+EXT_V3xD)
843 * | |
844 * | ARCH_VFP_V3xD_FP16 (+EXT_FP16)
845 * | |
846 * | ARCH_VFP_V4_SP_D16 (+EXT_FMA)
847 * |
848 * ARCH_VFP_V1 (+EXT_V1)
849 * |
850 * ARCH_VFP_V2 (+EXT_V2)
851 * |
852 * ARCH_VFP_V3D16 (+EXT_V3xD+EXT_V3)
853 * |
854 * +-------------------+
855 * | |
856 * | ARCH_VFP_V3D16_FP16 (+EXT_FP16)
857 * |
858 * +-------------------+
859 * | |
860 * | ARCH_VFP_V4_D16 (+EXT_FP16+EXT_FMA)
861 * | |
862 * | ARCH_VFP_V4 (+EXT_D32)
863 * | |
864 * | ARCH_NEON_VFP_V4 (+EXT_NEON+EXT_NEON_FMA)
865 * |
866 * ARCH_VFP_V3 (+EXT_D32)
867 * |
868 * +-------------------+
869 * | |
870 * | ARCH_VFP_V3_FP16 (+EXT_FP16)
871 * |
872 * ARCH_VFP_V3_PLUS_NEON_V1 (+EXT_NEON)
873 * |
874 * ARCH_NEON_FP16 (+EXT_FP16)
875 *
876 * -fpu=<name> values and their correspondance with FPU architectures above:
877 *
878 * {"vfp", FPU_ARCH_VFP_V2},
879 * {"vfp9", FPU_ARCH_VFP_V2},
880 * {"vfp3", FPU_ARCH_VFP_V3}, // For backwards compatbility.
881 * {"vfp10", FPU_ARCH_VFP_V2},
882 * {"vfp10-r0", FPU_ARCH_VFP_V1},
883 * {"vfpxd", FPU_ARCH_VFP_V1xD},
884 * {"vfpv2", FPU_ARCH_VFP_V2},
885 * {"vfpv3", FPU_ARCH_VFP_V3},
886 * {"vfpv3-fp16", FPU_ARCH_VFP_V3_FP16},
887 * {"vfpv3-d16", FPU_ARCH_VFP_V3D16},
888 * {"vfpv3-d16-fp16", FPU_ARCH_VFP_V3D16_FP16},
889 * {"vfpv3xd", FPU_ARCH_VFP_V3xD},
890 * {"vfpv3xd-fp16", FPU_ARCH_VFP_V3xD_FP16},
891 * {"neon", FPU_ARCH_VFP_V3_PLUS_NEON_V1},
892 * {"neon-fp16", FPU_ARCH_NEON_FP16},
893 * {"vfpv4", FPU_ARCH_VFP_V4},
894 * {"vfpv4-d16", FPU_ARCH_VFP_V4D16},
895 * {"fpv4-sp-d16", FPU_ARCH_VFP_V4_SP_D16},
896 * {"neon-vfpv4", FPU_ARCH_NEON_VFP_V4},
897 *
898 *
899 * Simplified diagram that only includes FPUs supported by Android:
900 * Only ARCH_VFP_V3D16 is actually mandated by the armeabi-v7a ABI,
901 * all others are optional and must be probed at runtime.
902 *
903 * ARCH_VFP_V3D16 (EXT_V1xD+EXT_V1+EXT_V2+EXT_V3xD+EXT_V3)
904 * |
905 * +-------------------+
906 * | |
907 * | ARCH_VFP_V3D16_FP16 (+EXT_FP16)
908 * |
909 * +-------------------+
910 * | |
911 * | ARCH_VFP_V4_D16 (+EXT_FP16+EXT_FMA)
912 * | |
913 * | ARCH_VFP_V4 (+EXT_D32)
914 * | |
915 * | ARCH_NEON_VFP_V4 (+EXT_NEON+EXT_NEON_FMA)
916 * |
917 * ARCH_VFP_V3 (+EXT_D32)
918 * |
919 * +-------------------+
920 * | |
921 * | ARCH_VFP_V3_FP16 (+EXT_FP16)
922 * |
923 * ARCH_VFP_V3_PLUS_NEON_V1 (+EXT_NEON)
924 * |
925 * ARCH_NEON_FP16 (+EXT_FP16)
926 *
927 */
928