Lines Matching refs:DestReg
1267 static bool forwardCopyWillClobberTuple(unsigned DestReg, unsigned SrcReg, in forwardCopyWillClobberTuple() argument
1271 return ((DestReg - SrcReg) & 0x1f) < NumRegs; in forwardCopyWillClobberTuple()
1276 unsigned DestReg, unsigned SrcReg, bool KillSrc, unsigned Opcode, in copyPhysRegTuple() argument
1281 uint16_t DestEncoding = TRI->getEncodingValue(DestReg); in copyPhysRegTuple()
1294 AddSubReg(MIB, DestReg, Indices[SubReg], RegState::Define, TRI); in copyPhysRegTuple()
1302 unsigned DestReg, unsigned SrcReg, in copyPhysReg() argument
1304 if (AArch64::GPR32spRegClass.contains(DestReg) && in copyPhysReg()
1308 if (DestReg == AArch64::WSP || SrcReg == AArch64::WSP) { in copyPhysReg()
1312 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg()
1326 BuildMI(MBB, I, DL, get(AArch64::ADDWri), DestReg) in copyPhysReg()
1332 BuildMI(MBB, I, DL, get(AArch64::MOVZWi), DestReg).addImm(0).addImm( in copyPhysReg()
1337 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg()
1351 BuildMI(MBB, I, DL, get(AArch64::ORRWrr), DestReg) in copyPhysReg()
1359 if (AArch64::GPR64spRegClass.contains(DestReg) && in copyPhysReg()
1361 if (DestReg == AArch64::SP || SrcReg == AArch64::SP) { in copyPhysReg()
1363 BuildMI(MBB, I, DL, get(AArch64::ADDXri), DestReg) in copyPhysReg()
1368 BuildMI(MBB, I, DL, get(AArch64::MOVZXi), DestReg).addImm(0).addImm( in copyPhysReg()
1372 BuildMI(MBB, I, DL, get(AArch64::ORRXrr), DestReg) in copyPhysReg()
1380 if (AArch64::DDDDRegClass.contains(DestReg) && in copyPhysReg()
1384 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8, in copyPhysReg()
1390 if (AArch64::DDDRegClass.contains(DestReg) && in copyPhysReg()
1394 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8, in copyPhysReg()
1400 if (AArch64::DDRegClass.contains(DestReg) && in copyPhysReg()
1403 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8, in copyPhysReg()
1409 if (AArch64::QQQQRegClass.contains(DestReg) && in copyPhysReg()
1413 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8, in copyPhysReg()
1419 if (AArch64::QQQRegClass.contains(DestReg) && in copyPhysReg()
1423 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8, in copyPhysReg()
1429 if (AArch64::QQRegClass.contains(DestReg) && in copyPhysReg()
1432 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8, in copyPhysReg()
1437 if (AArch64::FPR128RegClass.contains(DestReg) && in copyPhysReg()
1440 BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg) in copyPhysReg()
1451 .addReg(DestReg, RegState::Define) in copyPhysReg()
1458 if (AArch64::FPR64RegClass.contains(DestReg) && in copyPhysReg()
1461 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg()
1465 BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg) in copyPhysReg()
1469 BuildMI(MBB, I, DL, get(AArch64::FMOVDr), DestReg) in copyPhysReg()
1475 if (AArch64::FPR32RegClass.contains(DestReg) && in copyPhysReg()
1478 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg()
1482 BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg) in copyPhysReg()
1486 BuildMI(MBB, I, DL, get(AArch64::FMOVSr), DestReg) in copyPhysReg()
1492 if (AArch64::FPR16RegClass.contains(DestReg) && in copyPhysReg()
1495 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
1499 BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg) in copyPhysReg()
1503 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
1507 BuildMI(MBB, I, DL, get(AArch64::FMOVSr), DestReg) in copyPhysReg()
1513 if (AArch64::FPR8RegClass.contains(DestReg) && in copyPhysReg()
1516 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::bsub, in copyPhysReg()
1520 BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg) in copyPhysReg()
1524 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::bsub, in copyPhysReg()
1528 BuildMI(MBB, I, DL, get(AArch64::FMOVSr), DestReg) in copyPhysReg()
1535 if (AArch64::FPR64RegClass.contains(DestReg) && in copyPhysReg()
1537 BuildMI(MBB, I, DL, get(AArch64::FMOVXDr), DestReg) in copyPhysReg()
1541 if (AArch64::GPR64RegClass.contains(DestReg) && in copyPhysReg()
1543 BuildMI(MBB, I, DL, get(AArch64::FMOVDXr), DestReg) in copyPhysReg()
1548 if (AArch64::FPR32RegClass.contains(DestReg) && in copyPhysReg()
1550 BuildMI(MBB, I, DL, get(AArch64::FMOVWSr), DestReg) in copyPhysReg()
1554 if (AArch64::GPR32RegClass.contains(DestReg) && in copyPhysReg()
1556 BuildMI(MBB, I, DL, get(AArch64::FMOVSWr), DestReg) in copyPhysReg()
1561 if (DestReg == AArch64::NZCV) { in copyPhysReg()
1571 assert(AArch64::GPR64RegClass.contains(DestReg) && "Invalid NZCV copy"); in copyPhysReg()
1573 .addReg(DestReg) in copyPhysReg()
1681 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, in loadRegFromStackSlot() argument
1708 if (TargetRegisterInfo::isVirtualRegister(DestReg)) in loadRegFromStackSlot()
1709 MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR32RegClass); in loadRegFromStackSlot()
1711 assert(DestReg != AArch64::WSP); in loadRegFromStackSlot()
1718 if (TargetRegisterInfo::isVirtualRegister(DestReg)) in loadRegFromStackSlot()
1719 MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR64RegClass); in loadRegFromStackSlot()
1721 assert(DestReg != AArch64::SP); in loadRegFromStackSlot()
1770 .addReg(DestReg, getDefRegState(true)) in loadRegFromStackSlot()
1779 unsigned DestReg, unsigned SrcReg, int Offset, in emitFrameOffset() argument
1782 if (DestReg == SrcReg && Offset == 0) in emitFrameOffset()
1817 BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg) in emitFrameOffset()
1823 SrcReg = DestReg; in emitFrameOffset()
1828 BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg) in emitFrameOffset()