Searched defs:ShiftAmount (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 636 static bool Is_PostInc_S4_Offset(SDNode * S, int ShiftAmount) { in Is_PostInc_S4_Offset()
679 int ShiftAmount = VT.getSizeInBits() / 16; in getPostIndexedAddressParts() local
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 194 unsigned ShiftAmount; member
1629 unsigned ShiftAmount, in CreateShiftedImm()
2172 uint64_t ShiftAmount = 0; in tryParseAddSubImm() local
2209 int64_t ShiftAmount = Parser.getTok().getIntVal(); in tryParseAddSubImm() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 780 SDValue ShiftAmount = DAG.getConstant(EltWidth - SrcEltWidth, VT); in ExpandSIGN_EXTEND_VECTOR_INREG() local
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| D | LegalizeDAG.cpp | 403 SDValue ShiftAmount = DAG.getConstant(NumBits, in ExpandUnalignedStore() local
563 SDValue ShiftAmount = DAG.getConstant(NumBits, in ExpandUnalignedLoad() local
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 760 uint64_t ShiftAmount = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); in LowerShifts() local
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| /external/llvm/lib/Analysis/ |
| D | InstructionSimplify.cpp | 1976 unsigned ShiftAmount = Width - 1; in SimplifyICmpInst() local
1990 unsigned ShiftAmount = Width - 1; in SimplifyICmpInst() local
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| /external/llvm/lib/Target/R600/ |
| D | R600ISelLowering.cpp | 1582 SDValue ShiftAmount = in LowerLOAD() local
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 4026 const MCExpr *ShiftAmount; in parsePKHImm() local
4107 const MCExpr *ShiftAmount; in parseShifterImm() local
4168 const MCExpr *ShiftAmount; in parseRotImm() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1781 SDValue &Src, int &ShiftAmount, in isBitfieldPositioningOp()
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| D | AArch64ISelLowering.cpp | 6455 static bool findEXTRHalf(SDValue N, SDValue &Src, uint32_t &ShiftAmount, in findEXTRHalf()
7026 int64_t ShiftAmount; in tryCombineShiftImm() local
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