| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.cpp | 29 AMDGPUInstrInfo::AMDGPUInstrInfo(TargetMachine &tm) in AMDGPUInstrInfo() function in AMDGPUInstrInfo
32 const AMDGPURegisterInfo &AMDGPUInstrInfo::getRegisterInfo() const { in getRegisterInfo()
36 bool AMDGPUInstrInfo::isCoalescableExtInstr(const MachineInstr &MI, in isCoalescableExtInstr()
43 unsigned AMDGPUInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, in isLoadFromStackSlot()
49 unsigned AMDGPUInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI, in isLoadFromStackSlotPostFE()
55 bool AMDGPUInstrInfo::hasLoadFromStackSlot(const MachineInstr *MI, in hasLoadFromStackSlot()
61 unsigned AMDGPUInstrInfo::isStoreFromStackSlot(const MachineInstr *MI, in isStoreFromStackSlot()
66 unsigned AMDGPUInstrInfo::isStoreFromStackSlotPostFE(const MachineInstr *MI, in isStoreFromStackSlotPostFE()
71 bool AMDGPUInstrInfo::hasStoreFromStackSlot(const MachineInstr *MI, in hasStoreFromStackSlot()
79 AMDGPUInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, in convertToThreeAddress()
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| D | AMDGPU.td | 14 def AMDGPUInstrInfo : InstrInfo {}
27 let InstructionSet = AMDGPUInstrInfo;
35 include "AMDGPUInstrInfo.td"
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| D | AMDGPUConvertToISA.cpp | 49 const AMDGPUInstrInfo * TII = in runOnMachineFunction()
50 static_cast<const AMDGPUInstrInfo*>(TM.getInstrInfo()); in runOnMachineFunction()
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| D | AMDGPUTargetMachine.h | 35 const AMDGPUInstrInfo * InstrInfo;
53 virtual const AMDGPUInstrInfo *getInstrInfo() const {return InstrInfo;} in getInstrInfo()
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| D | Makefile.sources | 4 AMDGPUInstrInfo.td \
63 AMDGPUInstrInfo.cpp \
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| D | AMDGPUInstrInfo.h | 40 class AMDGPUInstrInfo : public AMDGPUGenInstrInfo {
47 explicit AMDGPUInstrInfo(TargetMachine &tm);
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| D | SIInstrInfo.h | 23 class SIInstrInfo : public AMDGPUInstrInfo {
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| D | SIInstrInfo.cpp | 26 : AMDGPUInstrInfo(tm), in SIInstrInfo()
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| D | R600InstrInfo.h | 32 class R600InstrInfo : public AMDGPUInstrInfo {
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.cpp | 29 AMDGPUInstrInfo::AMDGPUInstrInfo(TargetMachine &tm) in AMDGPUInstrInfo() function in AMDGPUInstrInfo
32 const AMDGPURegisterInfo &AMDGPUInstrInfo::getRegisterInfo() const { in getRegisterInfo()
36 bool AMDGPUInstrInfo::isCoalescableExtInstr(const MachineInstr &MI, in isCoalescableExtInstr()
43 unsigned AMDGPUInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, in isLoadFromStackSlot()
49 unsigned AMDGPUInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI, in isLoadFromStackSlotPostFE()
55 bool AMDGPUInstrInfo::hasLoadFromStackSlot(const MachineInstr *MI, in hasLoadFromStackSlot()
61 unsigned AMDGPUInstrInfo::isStoreFromStackSlot(const MachineInstr *MI, in isStoreFromStackSlot()
66 unsigned AMDGPUInstrInfo::isStoreFromStackSlotPostFE(const MachineInstr *MI, in isStoreFromStackSlotPostFE()
71 bool AMDGPUInstrInfo::hasStoreFromStackSlot(const MachineInstr *MI, in hasStoreFromStackSlot()
79 AMDGPUInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, in convertToThreeAddress()
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| D | AMDGPU.td | 14 def AMDGPUInstrInfo : InstrInfo {}
27 let InstructionSet = AMDGPUInstrInfo;
35 include "AMDGPUInstrInfo.td"
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| D | AMDGPUConvertToISA.cpp | 49 const AMDGPUInstrInfo * TII = in runOnMachineFunction()
50 static_cast<const AMDGPUInstrInfo*>(TM.getInstrInfo()); in runOnMachineFunction()
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| D | AMDGPUTargetMachine.h | 35 const AMDGPUInstrInfo * InstrInfo;
53 virtual const AMDGPUInstrInfo *getInstrInfo() const {return InstrInfo;} in getInstrInfo()
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| D | Makefile.sources | 4 AMDGPUInstrInfo.td \
63 AMDGPUInstrInfo.cpp \
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| D | AMDGPUInstrInfo.h | 40 class AMDGPUInstrInfo : public AMDGPUGenInstrInfo {
47 explicit AMDGPUInstrInfo(TargetMachine &tm);
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| D | SIInstrInfo.h | 23 class SIInstrInfo : public AMDGPUInstrInfo {
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| D | SIInstrInfo.cpp | 26 : AMDGPUInstrInfo(tm), in SIInstrInfo()
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| D | R600InstrInfo.h | 32 class R600InstrInfo : public AMDGPUInstrInfo {
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| D | AMDGPUInstrInfo.td | 1 //===-- AMDGPUInstrInfo.td - AMDGPU DAG nodes --------------*- tablegen -*-===//
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUInstrInfo.cpp | 31 void AMDGPUInstrInfo::anchor() {} in anchor()
33 AMDGPUInstrInfo::AMDGPUInstrInfo(const AMDGPUSubtarget &st) in AMDGPUInstrInfo() function in AMDGPUInstrInfo
36 const AMDGPURegisterInfo &AMDGPUInstrInfo::getRegisterInfo() const { in getRegisterInfo()
40 bool AMDGPUInstrInfo::isCoalescableExtInstr(const MachineInstr &MI, in isCoalescableExtInstr()
47 unsigned AMDGPUInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, in isLoadFromStackSlot()
53 unsigned AMDGPUInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI, in isLoadFromStackSlotPostFE()
59 bool AMDGPUInstrInfo::hasLoadFromStackSlot(const MachineInstr *MI, in hasLoadFromStackSlot()
65 unsigned AMDGPUInstrInfo::isStoreFromStackSlot(const MachineInstr *MI, in isStoreFromStackSlot()
70 unsigned AMDGPUInstrInfo::isStoreFromStackSlotPostFE(const MachineInstr *MI, in isStoreFromStackSlotPostFE()
75 bool AMDGPUInstrInfo::hasStoreFromStackSlot(const MachineInstr *MI, in hasStoreFromStackSlot()
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| D | AMDGPUSubtarget.h | 32 std::unique_ptr<AMDGPUInstrInfo> InstrInfo;
65 const AMDGPUInstrInfo *getInstrInfo() const { in getInstrInfo()
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| D | AMDGPU.td | 120 def AMDGPUInstrInfo : InstrInfo {
126 let InstructionSet = AMDGPUInstrInfo;
148 include "AMDGPUInstrInfo.td"
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| D | AMDGPUInstrInfo.h | 41 class AMDGPUInstrInfo : public AMDGPUGenInstrInfo {
50 explicit AMDGPUInstrInfo(const AMDGPUSubtarget &st);
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| D | AMDGPUTargetMachine.h | 47 const AMDGPUInstrInfo *getInstrInfo() const override { in getInstrInfo()
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| D | CMakeLists.txt | 26 AMDGPUInstrInfo.cpp
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