/external/llvm/test/Transforms/InstCombine/ |
D | ffs-1.ll | 105 ; CHECK-NEXT: [[CTTZ:%[a-z0-9]+]] = call i32 @llvm.cttz.i32(i32 %x, i1 false) 106 ; CHECK-NEXT: [[INC:%[a-z0-9]+]] = add nuw nsw i32 [[CTTZ]], 1 116 ; CHECK-LINUX-NEXT: [[CTTZ:%[a-z0-9]+]] = call i32 @llvm.cttz.i32(i32 %x, i1 false) 117 ; CHECK-LINUX-NEXT: [[INC:%[a-z0-9]+]] = add nuw nsw i32 [[CTTZ]], 1 127 ; CHECK-LINUX-NEXT: [[CTTZ:%[a-z0-9]+]] = call i64 @llvm.cttz.i64(i64 %x, i1 false) 128 ; CHECK-LINUX-NEXT: [[INC:%[a-z0-9]+]] = add nuw nsw i64 [[CTTZ]], 1
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 314 BSWAP, CTTZ, CTLZ, CTPOP, enumerator
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 286 case ISD::CTTZ: return "cttz"; in getOperationName()
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D | LegalizeVectorTypes.cpp | 74 case ISD::CTTZ: in ScalarizeVectorResult() 587 case ISD::CTTZ: in SplitVectorResult() 1211 case ISD::CTTZ: in SplitVectorOperand() 1621 case ISD::CTTZ: in WidenVectorResult()
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D | LegalizeVectorOps.cpp | 260 case ISD::CTTZ: in LegalizeOp()
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D | LegalizeDAG.cpp | 2799 return DAG.getNode(ISD::CTTZ, dl, Op.getValueType(), Op); in ExpandBitCount() 2800 case ISD::CTTZ: { in ExpandBitCount() 2963 case ISD::CTTZ: in ExpandNode() 4149 case ISD::CTTZ: in PromoteNode() 4159 if (Node->getOpcode() == ISD::CTTZ) { in PromoteNode()
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D | LegalizeIntegerTypes.cpp | 65 case ISD::CTTZ: Res = PromoteIntRes_CTTZ(N); break; in PromoteIntegerResult() 363 if (N->getOpcode() == ISD::CTTZ) { in PromoteIntRes_CTTZ() 1140 case ISD::CTTZ: ExpandIntRes_CTTZ(N, Lo, Hi); break; in ExpandIntegerResult()
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D | SelectionDAG.cpp | 2143 case ISD::CTTZ: in computeKnownBits() 2709 case ISD::CTTZ: in getNode()
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D | DAGCombiner.cpp | 1227 case ISD::CTTZ: return visitCTTZ(N); in visit() 4480 return DAG.getNode(ISD::CTTZ, SDLoc(N), VT, N0); in visitCTTZ()
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D | SelectionDAGBuilder.cpp | 5187 setValue(&I, DAG.getNode(CI->isZero() ? ISD::CTTZ : ISD::CTTZ_ZERO_UNDEF, in visitIntrinsicCall()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 119 setOperationAction(ISD::CTTZ, MVT::i8, Expand); in MSP430TargetLowering() 120 setOperationAction(ISD::CTTZ, MVT::i16, Expand); in MSP430TargetLowering()
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 157 setOperationAction(ISD::CTTZ, VT, Expand); in InitAMDILLowering()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 157 setOperationAction(ISD::CTTZ, VT, Expand); in InitAMDILLowering()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1404 setOperationAction(ISD::CTTZ, MVT::i32, Expand); in HexagonTargetLowering() 1405 setOperationAction(ISD::CTTZ, MVT::i64, Expand); in HexagonTargetLowering()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 245 setOperationAction(ISD::CTTZ, MVT::i16, Expand); in NVPTXTargetLowering() 246 setOperationAction(ISD::CTTZ, MVT::i32, Expand); in NVPTXTargetLowering() 247 setOperationAction(ISD::CTTZ, MVT::i64, Expand); in NVPTXTargetLowering()
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.cpp | 259 setOperationAction(ISD::CTTZ, VT, Expand); in AMDGPUTargetLowering() 322 setOperationAction(ISD::CTTZ, VT, Expand); in AMDGPUTargetLowering()
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1471 setOperationAction(ISD::CTTZ , MVT::i64, Expand); in SparcTargetLowering() 1526 setOperationAction(ISD::CTTZ , MVT::i32, Expand); in SparcTargetLowering()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 353 def cttz : SDNode<"ISD::CTTZ" , SDTIntUnaryOp>;
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/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 309 setOperationAction(ISD::CTTZ, MVT::i32, Expand); in MipsTargetLowering() 310 setOperationAction(ISD::CTTZ, MVT::i64, Expand); in MipsTargetLowering()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 210 setOperationAction(ISD::CTTZ , MVT::i32 , Expand); in PPCTargetLowering() 214 setOperationAction(ISD::CTTZ , MVT::i64 , Expand); in PPCTargetLowering() 466 setOperationAction(ISD::CTTZ, VT, Expand); in PPCTargetLowering()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 478 setOperationAction(ISD::CTTZ , MVT::i8 , Promote); in resetOperationActions() 479 AddPromotedToType (ISD::CTTZ , MVT::i8 , MVT::i32); in resetOperationActions() 488 setOperationAction(ISD::CTTZ , MVT::i16 , Custom); in resetOperationActions() 489 setOperationAction(ISD::CTTZ , MVT::i32 , Custom); in resetOperationActions() 491 setOperationAction(ISD::CTTZ , MVT::i64 , Custom); in resetOperationActions() 848 setOperationAction(ISD::CTTZ, VT, Expand); in resetOperationActions() 16230 case ISD::CTTZ: return LowerCTTZ(Op, DAG); in LowerOperation()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 168 setOperationAction(ISD::CTTZ, VT, Expand); in SystemZTargetLowering()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 638 setOperationAction(ISD::CTTZ, MVT::i32, Custom); in ARMTargetLowering() 6230 case ISD::CTTZ: return LowerCTTZ(Op.getNode(), DAG, Subtarget); in LowerOperation()
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