/external/llvm/lib/Target/PowerPC/AsmParser/ |
D | PPCAsmParser.cpp | 524 Inst.addOperand(MCOperand::CreateImm(getImm())); in addImmOperands() 532 Inst.addOperand(MCOperand::CreateImm(getImm() / 4)); in addBranchTargetOperands() 578 static std::unique_ptr<PPCOperand> CreateImm(int64_t Val, SMLoc S, SMLoc E, in CreateImm() function 612 return CreateImm(CE->getValue(), S, E, IsPPC64); in CreateFromMCExpr() 660 TmpInst.addOperand(MCOperand::CreateImm(-N)); in ProcessInstruction() 670 TmpInst.addOperand(MCOperand::CreateImm(-N)); in ProcessInstruction() 680 TmpInst.addOperand(MCOperand::CreateImm(-N)); in ProcessInstruction() 690 TmpInst.addOperand(MCOperand::CreateImm(-N)); in ProcessInstruction() 702 TmpInst.addOperand(MCOperand::CreateImm(B)); in ProcessInstruction() 703 TmpInst.addOperand(MCOperand::CreateImm(0)); in ProcessInstruction() [all …]
|
/external/llvm/lib/Target/Mips/Disassembler/ |
D | MipsDisassembler.cpp | 432 MI.addOperand(MCOperand::CreateImm(tmp)); in DecodeINSVE_DF() 438 MI.addOperand(MCOperand::CreateImm(0)); in DecodeINSVE_DF() 477 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeAddiGroupBranch() 516 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeDaddiGroupBranch() 559 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeBlezlGroupBranch() 603 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeBgtzlGroupBranch() 652 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeBgtzGroupBranch() 694 MI.addOperand(MCOperand::CreateImm(Imm)); in DecodeBlezGroupBranch() 979 Inst.addOperand(MCOperand::CreateImm(Offset)); in DecodeMem() 1011 Inst.addOperand(MCOperand::CreateImm(Offset)); in DecodeMSA128Mem() [all …]
|
/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 636 I = MI.insert(I, MCOperand::CreateImm(CC)); in AddThumbPredicate() 646 I = MI.insert(I, MCOperand::CreateImm(CC)); in AddThumbPredicate() 1108 Inst.addOperand(MCOperand::CreateImm(Val)); in DecodePredicateOperand() 1130 Inst.addOperand(MCOperand::CreateImm(rot_imm)); in DecodeSOImmOperand() 1166 Inst.addOperand(MCOperand::CreateImm(Op)); in DecodeSORegImmOperand() 1201 Inst.addOperand(MCOperand::CreateImm(Shift)); in DecodeSORegRegOperand() 1315 Inst.addOperand(MCOperand::CreateImm(~(msb_mask ^ lsb_mask))); in DecodeBitfieldMaskOperand() 1375 Inst.addOperand(MCOperand::CreateImm(coproc)); in DecodeCopMemInstruction() 1376 Inst.addOperand(MCOperand::CreateImm(CRd)); in DecodeCopMemInstruction() 1414 Inst.addOperand(MCOperand::CreateImm(imm)); in DecodeCopMemInstruction() [all …]
|
/external/llvm/lib/Target/SystemZ/Disassembler/ |
D | SystemZDisassembler.cpp | 112 Inst.addOperand(MCOperand::CreateImm(Imm)); in decodeUImmOperand() 119 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 173 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm) * 2 + Address)); in decodePCDBLOperand() 195 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDAddr12Operand() 205 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand() 216 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDXAddr12Operand() 228 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand() 240 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDLAddr12Len8Operand() 241 Inst.addOperand(MCOperand::CreateImm(Length + 1)); in decodeBDLAddr12Len8Operand()
|
/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 1115 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr() 1117 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr() 1182 Inst.addOperand(MCOperand::CreateImm(getVectorIndex())); in addVectorIndex1Operands() 1187 Inst.addOperand(MCOperand::CreateImm(getVectorIndex())); in addVectorIndexBOperands() 1192 Inst.addOperand(MCOperand::CreateImm(getVectorIndex())); in addVectorIndexHOperands() 1197 Inst.addOperand(MCOperand::CreateImm(getVectorIndex())); in addVectorIndexSOperands() 1202 Inst.addOperand(MCOperand::CreateImm(getVectorIndex())); in addVectorIndexDOperands() 1217 Inst.addOperand(MCOperand::CreateImm(getShiftedImmShift())); in addAddSubImmOperands() 1220 Inst.addOperand(MCOperand::CreateImm(0)); in addAddSubImmOperands() 1226 Inst.addOperand(MCOperand::CreateImm(getCondCode())); in addCondCodeOperands() [all …]
|
/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 596 Inst.addOperand(MCOperand::CreateImm(64 - Imm)); in DecodeFixedPointScaleImm32() 603 Inst.addOperand(MCOperand::CreateImm(64 - Imm)); in DecodeFixedPointScaleImm64() 619 Inst.addOperand(MCOperand::CreateImm(ImmVal)); in DecodePCRelLabel19() 625 Inst.addOperand(MCOperand::CreateImm((Imm >> 1) & 1)); in DecodeMemExtend() 626 Inst.addOperand(MCOperand::CreateImm(Imm & 1)); in DecodeMemExtend() 638 Inst.addOperand(MCOperand::CreateImm(Imm)); in DecodeMRSSystemRegister() 655 Inst.addOperand(MCOperand::CreateImm(Imm)); in DecodeMSRSystemRegister() 682 Inst.addOperand(MCOperand::CreateImm(1)); in DecodeFMOVLaneInstruction() 689 Inst.addOperand(MCOperand::CreateImm(Add - Imm)); in DecodeVecShiftRImm() 695 Inst.addOperand(MCOperand::CreateImm((Imm + Add) & (Add - 1))); in DecodeVecShiftLImm() [all …]
|
/external/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.cpp | 40 NopInst.addOperand(MCOperand::CreateImm(0)); in getNoopForMachoTarget() 41 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in getNoopForMachoTarget() 47 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in getNoopForMachoTarget()
|
/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 534 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr() 536 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr() 791 CreateImm(const MCExpr *Val, SMLoc S, SMLoc E, MipsAsmParser &Parser) { in CreateImm() function in __anonc89f468b0311::MipsOperand 972 NopInst.addOperand(MCOperand::CreateImm(0)); in processInstruction() 1062 tmpInst.addOperand(MCOperand::CreateImm(16)); in createShiftOr() 1071 MCOperand::CreateImm(((Value & (0xffffLL << Shift)) >> Shift))); in createShiftOr() 1095 tmpInst.addOperand(MCOperand::CreateImm(ImmValue)); in expandLoadImm() 1103 tmpInst.addOperand(MCOperand::CreateImm(ImmValue)); in expandLoadImm() 1112 tmpInst.addOperand(MCOperand::CreateImm((ImmValue & 0xffff0000) >> 16)); in expandLoadImm() 1138 MCOperand::CreateImm((ImmValue & (0xffffLL << 32)) >> 32)); in expandLoadImm() [all …]
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonMCInstLower.cpp | 64 MCO = MCOperand::CreateImm(*Val.bitcastToAPInt().getRawData()); in HexagonLowerToMC() 68 MCO = MCOperand::CreateImm(MO.getImm()); in HexagonLowerToMC()
|
/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 1696 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr() 1698 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr() 1705 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addCondCodeOperands() 1712 Inst.addOperand(MCOperand::CreateImm(getCoproc())); in addCoprocNumOperands() 1717 Inst.addOperand(MCOperand::CreateImm(getCoproc())); in addCoprocRegOperands() 1722 Inst.addOperand(MCOperand::CreateImm(CoprocOption.Val)); in addCoprocOptionOperands() 1727 Inst.addOperand(MCOperand::CreateImm(ITMask.Mask)); in addITMaskOperands() 1732 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addITCondCodeOperands() 1751 Inst.addOperand(MCOperand::CreateImm( in addRegShiftedRegOperands() 1762 Inst.addOperand(MCOperand::CreateImm( in addRegShiftedImmOperands() [all …]
|
/external/llvm/lib/Target/Sparc/Disassembler/ |
D | SparcDisassembler.cpp | 297 MI.addOperand(MCOperand::CreateImm(simm13)); in DecodeMem() 375 MI.addOperand(MCOperand::CreateImm(tgt)); in DecodeCall() 382 MI.addOperand(MCOperand::CreateImm(tgt)); in DecodeSIMM13() 411 MI.addOperand(MCOperand::CreateImm(simm13)); in DecodeJMPL() 439 MI.addOperand(MCOperand::CreateImm(simm13)); in DecodeReturn() 473 MI.addOperand(MCOperand::CreateImm(simm13)); in DecodeSWAP()
|
/external/llvm/lib/Target/X86/AsmParser/ |
D | X86Operand.h | 330 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr() 379 Inst.addOperand(MCOperand::CreateImm(getMemScale())); in addMemOperands() 389 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addAbsMemOperands() 408 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addMemOffsOperands() 435 static std::unique_ptr<X86Operand> CreateImm(const MCExpr *Val, in CreateImm() function
|
/external/llvm/lib/Target/X86/ |
D | X86InstrBuilder.h | 72 MO.push_back(MachineOperand::CreateImm(Scale)); in getFullAddress() 79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
|
/external/llvm/lib/Target/R600/ |
D | SIInstrInfo.cpp | 814 return MachineOperand::CreateImm(Op.getImm() & 0xFFFFFFFF); in buildExtractSubRegOrImm() 816 return MachineOperand::CreateImm(Op.getImm() >> 32); in buildExtractSubRegOrImm() 1169 MI->addOperand(*MBB->getParent(), MachineOperand::CreateImm(ImmOffset)); in moveSMRDToVALU() 1273 Inst->addOperand(MachineOperand::CreateImm(0)); in moveToVALU() 1274 Inst->addOperand(MachineOperand::CreateImm(0)); in moveToVALU() 1275 Inst->addOperand(MachineOperand::CreateImm(0)); in moveToVALU() 1276 Inst->addOperand(MachineOperand::CreateImm(Size)); in moveToVALU() 1280 Inst->addOperand(MachineOperand::CreateImm(0)); in moveToVALU() 1281 Inst->addOperand(MachineOperand::CreateImm(0)); in moveToVALU() 1285 Inst->addOperand(MachineOperand::CreateImm(0)); in moveToVALU() [all …]
|
/external/llvm/lib/Target/XCore/Disassembler/ |
D | XCoreDisassembler.cpp | 243 Inst.addOperand(MCOperand::CreateImm(Values[Val])); in DecodeBitpOperand() 249 Inst.addOperand(MCOperand::CreateImm(-(int64_t)Val)); in DecodeNegImmOperand() 378 Inst.addOperand(MCOperand::CreateImm(Op1)); in Decode2RImmInstruction() 419 Inst.addOperand(MCOperand::CreateImm(Op2)); in DecodeRUSInstruction() 568 Inst.addOperand(MCOperand::CreateImm(Op1)); in Decode3RImmInstruction() 583 Inst.addOperand(MCOperand::CreateImm(Op3)); in Decode2RUSInstruction() 639 Inst.addOperand(MCOperand::CreateImm(Op3)); in DecodeL2RUSInstruction()
|
/external/llvm/include/llvm/MC/ |
D | MCInstBuilder.h | 39 Inst.addOperand(MCOperand::CreateImm(Val)); in addImm()
|
/external/llvm/lib/Target/PowerPC/Disassembler/ |
D | PPCDisassembler.cpp | 246 Inst.addOperand(MCOperand::CreateImm(Imm)); in decodeUImmOperand() 254 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 288 Inst.addOperand(MCOperand::CreateImm(SignExtend64<16>(Disp))); in decodeMemRIOperands() 309 Inst.addOperand(MCOperand::CreateImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands()
|
/external/llvm/lib/Target/X86/Disassembler/ |
D | X86Disassembler.cpp | 388 mcInst.addOperand(MCOperand::CreateImm(immediate)); in translateImmediate() 538 scaleAmount = MCOperand::CreateImm(insn.sibScale); in translateRMMemory() 599 scaleAmount = MCOperand::CreateImm(1); in translateRMMemory() 602 displacement = MCOperand::CreateImm(insn.displacement); in translateRMMemory()
|
/external/llvm/lib/Target/Sparc/AsmParser/ |
D | SparcAsmParser.cpp | 265 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr() 267 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr() 309 static std::unique_ptr<SparcOperand> CreateImm(const MCExpr *Val, SMLoc S, in CreateImm() function in __anon6d25192b0111::SparcOperand 682 Op = SparcOperand::CreateImm(EVal, S, E); in parseSparcAsmOperand() 689 Op = SparcOperand::CreateImm(EVal, S, E); in parseSparcAsmOperand() 704 Op = SparcOperand::CreateImm(Res, S, E); in parseSparcAsmOperand()
|
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
D | AMDGPUMCInstLower.cpp | 48 MCOp = MCOperand::CreateImm(MO.getImm()); in lower()
|
/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDGPUMCInstLower.cpp | 48 MCOp = MCOperand::CreateImm(MO.getImm()); in lower()
|
/external/llvm/lib/Target/Sparc/ |
D | SparcMCInstLower.cpp | 80 return MCOperand::CreateImm(MO.getImm()); in LowerOperand()
|
/external/llvm/lib/Target/SystemZ/ |
D | SystemZMCInstLower.cpp | 83 return MCOperand::CreateImm(MO.getImm()); in lowerOperand()
|
/external/llvm/lib/Target/XCore/ |
D | XCoreMCInstLower.cpp | 92 return MCOperand::CreateImm(MO.getImm() + offset); in LowerOperand()
|
/external/llvm/lib/Target/MSP430/ |
D | MSP430MCInstLower.cpp | 130 MCOp = MCOperand::CreateImm(MO.getImm()); in Lower()
|