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Searched refs:EG (Results 1 – 25 of 434) sorted by relevance

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/external/llvm/test/CodeGen/R600/
Dudivrem64.ll2 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG --check-prefix=FUNC %s
5 ;EG: RECIP_UINT
6 ;EG: LSHL {{.*}}, 1,
7 ;EG: BFE_UINT
8 ;EG: BFE_UINT
9 ;EG: BFE_UINT
10 ;EG: BFE_UINT
11 ;EG: BFE_UINT
12 ;EG: BFE_UINT
13 ;EG: BFE_UINT
[all …]
Dudivrem.ll2 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG --check-prefix=FUNC %s
5 ; EG: RECIP_UINT
6 ; EG-DAG: MULHI
7 ; EG-DAG: MULLO_INT
8 ; EG-DAG: SUB_INT
9 ; EG: CNDE_INT
10 ; EG: MULHI
11 ; EG-DAG: ADD_INT
12 ; EG-DAG: SUB_INT
13 ; EG: CNDE_INT
[all …]
Dsrl.ll1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
4 ;EG-CHECK: @lshr_v2i32
5 ;EG-CHECK: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
6 ;EG-CHECK: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
22 ;EG-CHECK: @lshr_v4i32
23 ;EG-CHECK: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24 ;EG-CHECK: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
25 ;EG-CHECK: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
26 ;EG-CHECK: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
43 ;EG-CHECK: @lshr_i64
[all …]
Dsra.ll1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
4 ;EG-CHECK-LABEL: @ashr_v2i32
5 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
6 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
21 ;EG-CHECK-LABEL: @ashr_v4i32
22 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
23 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
25 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
42 ;EG-CHECK-LABEL: @ashr_i64
[all …]
Dkernel-args.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG-CHECK
2 ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG-CHECK
5 ; EG-CHECK-LABEL: @i8_arg
6 ; EG-CHECK: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
17 ; EG-CHECK-LABEL: @i8_zext_arg
18 ; EG-CHECK: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
29 ; EG-CHECK-LABEL: @i8_sext_arg
30 ; EG-CHECK: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
41 ; EG-CHECK-LABEL: @i16_arg
42 ; EG-CHECK: MOV {{[ *]*}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z
[all …]
Dshl.ll1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
4 ;EG-CHECK: @shl_v2i32
5 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
6 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
21 ;EG-CHECK: @shl_v4i32
22 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
23 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
25 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
42 ;EG-CHECK: @shl_i64
[all …]
Dfceil.ll2 ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
13 ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+\.[XYZW]]]
14 ; EG: CEIL {{\*? *}}[[RESULT]]
24 ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+]]{{\.[XYZW]}}
25 ; EG: CEIL {{\*? *}}[[RESULT]]
26 ; EG: CEIL {{\*? *}}[[RESULT]]
37 ; FIXME-EG: v3 is treated as v2 and v1, hence 2 stores
38 ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT1:T[0-9]+]]{{\.[XYZW]}}
39 ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT2:T[0-9]+]]{{\.[XYZW]}}
40 ; EG-DAG: CEIL {{\*? *}}[[RESULT1]]
[all …]
Dftrunc.ll1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG --check-prefix=FUNC %s
12 ; EG: TRUNC
21 ; EG: TRUNC
22 ; EG: TRUNC
32 ; FIXME-EG: TRUNC
33 ; FIXME-EG: TRUNC
34 ; FIXME-EG: TRUNC
45 ; EG: TRUNC
46 ; EG: TRUNC
47 ; EG: TRUNC
[all …]
Dstore.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK --check-prefix=FUNC %s
9 ; EG-CHECK: MEM_RAT MSKOR
18 ; EG-CHECK-LABEL: @store_i8
19 ; EG-CHECK: MEM_RAT MSKOR T[[RW_GPR:[0-9]]].XW, T{{[0-9]}}.X
20 ; EG-CHECK: VTX_READ_8 [[VAL:T[0-9]\.X]], [[VAL]]
22 ; EG-CHECK: AND_INT T{{[0-9]}}.[[BI_CHAN:[XYZW]]], KC0[2].Y, literal.x
23 ; EG-CHECK-NEXT: AND_INT * T{{[0-9]}}.[[TRUNC_CHAN:[XYZW]]], [[VAL]], literal.y
24 ; EG-CHECK-NEXT: 3(4.203895e-45), 255(3.573311e-43)
26 ; EG-CHECK: LSHL * T{{[0-9]}}.[[SHIFT_CHAN:[XYZW]]], PV.[[BI_CHAN]], literal.x
27 ; EG-CHECK-NEXT: 3
[all …]
Dadd.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK --check-prefix=FUNC %s
5 ;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
20 ;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
21 ;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
36 ;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
37 ;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
38 ;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
39 ;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
56 ; EG-CHECK: ADD_INT
57 ; EG-CHECK: ADD_INT
[all …]
Dsetcc-equivalent.ll1 ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
4 ; EG-LABEL: @and_setcc_setcc_i32
5 ; EG: AND_INT
6 ; EG-NEXT: SETE_INT
16 ; EG-LABEL: @and_setcc_setcc_v4i32
17 ; EG: AND_INT
18 ; EG: AND_INT
19 ; EG: SETE_INT
20 ; EG: AND_INT
21 ; EG: SETE_INT
[all …]
Dctpop.ll2 ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check…
17 ; EG: BCNT_INT
32 ; EG: BCNT_INT
50 ; EG: BCNT_INT
51 ; EG: BCNT_INT
67 ; EG: BCNT_INT
68 ; EG: BCNT_INT
83 ; EG: BCNT_INT
84 ; EG: BCNT_INT
85 ; EG: BCNT_INT
[all …]
Dsext-in-reg.ll2 ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check…
13 ; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+\.[XYZW]]], [[ADDR:T[0-9]+.[XYZW]]]
14 ; EG: BFE_INT [[RES]], {{.*}}, 0.0, 1
15 ; EG-NEXT: LSHR * [[ADDR]]
29 ; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+\.[XYZW]]], [[ADDR:T[0-9]+.[XYZW]]]
30 ; EG: ADD_INT
31 ; EG-NEXT: BFE_INT [[RES]], {{.*}}, 0.0, literal
32 ; EG-NEXT: LSHR * [[ADDR]]
47 ; EG: MEM_{{.*}} STORE_{{.*}} [[RES:T[0-9]+\.[XYZW]]], [[ADDR:T[0-9]+.[XYZW]]]
48 ; EG: ADD_INT
[all …]
Dsub.ll1 ;RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
7 ;EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
8 ;EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
23 ;EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24 ;EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
25 ;EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
26 ;EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
46 ; EG-DAG: SETGE_UINT
47 ; EG-DAG: CNDE_INT
48 ; EG-DAG: SUB_INT
[all …]
Dllvm.cos.ll1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s -check-prefix=EG -check-prefix=FUNC
5 ;EG: MULADD_IEEE *
6 ;EG: FRACT *
7 ;EG: ADD *
8 ;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
9 ;EG-NOT: COS
20 ;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
21 ;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
22 ;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
23 ;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
[all …]
Dllvm.sin.ll1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s -check-prefix=EG -check-prefix=FUNC
5 ;EG: MULADD_IEEE *
6 ;EG: FRACT *
7 ;EG: ADD *
8 ;EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
9 ;EG-NOT: SIN
21 ;EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
22 ;EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
23 ;EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
24 ;EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
[all …]
Dvselect.ll1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
4 ;EG-CHECK: @test_select_v2i32
5 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
6 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
22 ;EG-CHECK: @test_select_v2f32
23 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
40 ;EG-CHECK: @test_select_v4i32
41 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
42 ;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
[all …]
Dgv-const-addrspace.ll1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
13 ; EG-DAG: MOV {{\** *}}T2.X
14 ; EG-DAG: MOV {{\** *}}T3.X
15 ; EG-DAG: MOV {{\** *}}T4.X
16 ; EG-DAG: MOV {{\** *}}T5.X
17 ; EG-DAG: MOV {{\** *}}T6.X
18 ; EG: MOVA_INT
32 ; EG-DAG: MOV {{\** *}}T2.X
33 ; EG-DAG: MOV {{\** *}}T3.X
34 ; EG-DAG: MOV {{\** *}}T4.X
[all …]
Dvector-alloca.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG --check-prefix=FUNC %s
5 ; EG: MOV
6 ; EG: MOV
7 ; EG: MOV
8 ; EG: MOV
9 ; EG: MOVA_INT
28 ; EG: MOV
29 ; EG: MOV
30 ; EG: MOV
31 ; EG: MOV
[all …]
Dmul_uint24.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC
2 ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG --check-prefix=FUNC
6 ; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, KC0[2].W
21 ; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]}}.[[MUL_CHAN:[XYZW]]]
23 ; EG: BFE_INT {{[* ]*}}T{{[0-9]}}.{{[XYZW]}}, PV.[[MUL_CHAN]], 0.0, literal.x
24 ; EG: 16
36 ; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]}}.[[MUL_CHAN:[XYZW]]]
38 ; EG: BFE_INT {{[* ]*}}T{{[0-9]}}.{{[XYZW]}}, PV.[[MUL_CHAN]], 0.0, literal.x
52 ; EG; MUL_UINT24
53 ; EG: MULHI
Dselectcc.ll1 ; RUN: llc -verify-machineinstrs -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check…
5 ; EG: XOR_INT
6 ; EG: XOR_INT
7 ; EG: OR_INT
8 ; EG: CNDE_INT
9 ; EG: CNDE_INT
Dlocal-memory-two-objects.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
7 ; EG-CHECK: @local_memory_two_objects
10 ; EG-CHECK: .long 166120
11 ; EG-CHECK-NEXT: .long 8
18 ; EG-CHECK: LDS_WRITE
19 ; EG-CHECK: LDS_WRITE
24 ; EG-CHECK: GROUP_BARRIER
25 ; EG-CHECK-NEXT: ALU clause
29 ; EG-CHECK: LDS_READ_RET {{[*]*}} OQAP, {{PV|T}}[[ADDRR:[0-9]*\.[XYZW]]]
30 ; EG-CHECK-NOT: LDS_READ_RET {{[*]*}} OQAP, T[[ADDRR]]
Dmad_uint24.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC
2 ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG --check-prefix=FUNC
6 ; EG: MULADD_UINT24
23 ; EG: MULADD_UINT24 {{[* ]*}}T{{[0-9]}}.[[MAD_CHAN:[XYZW]]]
25 ; EG: BFE_INT {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[MAD_CHAN]], 0.0, literal.x
26 ; EG: 16
40 ; EG: MULADD_UINT24 {{[* ]*}}T{{[0-9]}}.[[MAD_CHAN:[XYZW]]]
42 ; EG: BFE_INT {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[MAD_CHAN]], 0.0, literal.x
43 ; EG: 8
64 ; EG: CNDE_INT
Dudiv.ll1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
4 ;EG-CHECK-LABEL: @test
5 ;EG-CHECK-NOT: SETGE_INT
6 ;EG-CHECK: CF_END
21 ;EG-CHECK-LABEL: @test2
22 ;EG-CHECK: CF_END
35 ;EG-CHECK-LABEL: @test4
36 ;EG-CHECK: CF_END
Dlocal-memory.ll1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
7 ; EG-CHECK-LABEL: @local_memory
12 ; EG-CHECK: .long 166120
13 ; EG-CHECK-NEXT: .long 128
19 ; EG-CHECK: LDS_WRITE
24 ; EG-CHECK: GROUP_BARRIER
25 ; EG-CHECK-NEXT: ALU clause
28 ; EG-CHECK: LDS_READ_RET

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