/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 487 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
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/external/llvm/lib/Target/PowerPC/ |
D | PPCCTRLoops.cpp | 271 case Intrinsic::floor: Opcode = ISD::FFLOOR; break; in mightUseCTR() 315 Opcode = ISD::FFLOOR; break; in mightUseCTR()
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D | PPCISelLowering.cpp | 138 setOperationAction(ISD::FFLOOR, MVT::ppcf128, Expand); in PPCTargetLowering() 197 setOperationAction(ISD::FFLOOR, MVT::f64, Legal); in PPCTargetLowering() 202 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); in PPCTargetLowering() 448 setOperationAction(ISD::FFLOOR, VT, Expand); in PPCTargetLowering() 496 setOperationAction(ISD::FFLOOR, MVT::v4f32, Legal); in PPCTargetLowering() 541 setOperationAction(ISD::FFLOOR, MVT::v2f64, Legal); in PPCTargetLowering()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 776 setOperationAction(ISD::FFLOOR, MVT::f16, Expand); in initActions() 787 setOperationAction(ISD::FFLOOR, MVT::f32, Expand); in initActions() 798 setOperationAction(ISD::FFLOOR, MVT::f64, Expand); in initActions() 809 setOperationAction(ISD::FFLOOR, MVT::f128, Expand); in initActions()
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D | BasicTargetTransformInfo.cpp | 565 case Intrinsic::floor: ISD = ISD::FFLOOR; break; in getIntrinsicInstrCost()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 149 case ISD::FFLOOR: return "ffloor"; in getOperationName()
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D | LegalizeFloatTypes.cpp | 78 case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break; in SoftenFloatResult() 823 case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break; in ExpandFloatResult()
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D | LegalizeVectorOps.cpp | 292 case ISD::FFLOOR: in LegalizeOp()
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D | LegalizeVectorTypes.cpp | 81 case ISD::FFLOOR: in ScalarizeVectorResult() 596 case ISD::FFLOOR: in SplitVectorResult() 1627 case ISD::FFLOOR: in WidenVectorResult()
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D | SelectionDAGBuilder.cpp | 5109 case Intrinsic::floor: Opcode = ISD::FFLOOR; break; in visitIntrinsicCall() 5942 if (visitUnaryFloatCall(I, ISD::FFLOOR)) in visitCall()
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D | LegalizeDAG.cpp | 3517 case ISD::FFLOOR: in ExpandNode()
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D | DAGCombiner.cpp | 1257 case ISD::FFLOOR: return visitFFLOOR(N); in visit() 7313 return DAG.getNode(ISD::FFLOOR, SDLoc(N), VT, N0); in visitFFLOOR()
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D | SelectionDAG.cpp | 2738 case ISD::FFLOOR: { in getNode()
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.cpp | 129 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); in AMDGPUTargetLowering() 236 setOperationAction(ISD::FFLOOR, MVT::f64, Custom); in AMDGPUTargetLowering() 342 setOperationAction(ISD::FFLOOR, VT, Expand); in AMDGPUTargetLowering() 542 case ISD::FFLOOR: return LowerFFLOOR(Op, DAG); in LowerOperation()
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D | SIISelLowering.cpp | 206 setOperationAction(ISD::FFLOOR, VT, Expand); in SITargetLowering() 212 setOperationAction(ISD::FFLOOR, MVT::f64, Legal); in SITargetLowering()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1968 case ISD::FFLOOR: { in SelectLIBM() 3007 case ISD::FFLOOR: in Select()
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D | AArch64ISelLowering.cpp | 285 setOperationAction(ISD::FFLOOR, Ty, Legal); in AArch64TargetLowering() 395 setOperationAction(ISD::FFLOOR, MVT::v1f64, Expand); in AArch64TargetLowering() 467 setOperationAction(ISD::FFLOOR, Ty, Legal); in AArch64TargetLowering()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 383 def ffloor : SDNode<"ISD::FFLOOR" , SDTFPUnaryOp>;
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 782 setOperationAction(ISD::FFLOOR, MVT::f80, Expand); in resetOperationActions() 835 setOperationAction(ISD::FFLOOR, VT, Expand); in resetOperationActions() 1059 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); in resetOperationActions() 1064 setOperationAction(ISD::FFLOOR, MVT::f64, Legal); in resetOperationActions() 1070 setOperationAction(ISD::FFLOOR, MVT::v4f32, Legal); in resetOperationActions() 1075 setOperationAction(ISD::FFLOOR, MVT::v2f64, Legal); in resetOperationActions() 1153 setOperationAction(ISD::FFLOOR, MVT::v8f32, Legal); in resetOperationActions() 1166 setOperationAction(ISD::FFLOOR, MVT::v4f64, Legal); in resetOperationActions()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 474 setOperationAction(ISD::FFLOOR, MVT::v2f64, Expand); in ARMTargetLowering() 491 setOperationAction(ISD::FFLOOR, MVT::v4f32, Expand); in ARMTargetLowering() 508 setOperationAction(ISD::FFLOOR, MVT::v2f32, Expand); in ARMTargetLowering()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 257 setOperationAction(ISD::FFLOOR, VT, Legal); in SystemZTargetLowering()
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