| /external/strace/xlat/ |
| D | open_mode_flags.h | 87 #if defined(FTRUNC) || (defined(HAVE_DECL_FTRUNC) && HAVE_DECL_FTRUNC)
88 XLAT(FTRUNC),
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| D | open_mode_flags.in | 30 FTRUNC
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 487 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCTRLoops.cpp | 273 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; in mightUseCTR()
335 Opcode = ISD::FTRUNC; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 140 setOperationAction(ISD::FTRUNC, MVT::ppcf128, Expand); in PPCTargetLowering()
199 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in PPCTargetLowering()
204 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in PPCTargetLowering()
450 setOperationAction(ISD::FTRUNC, VT, Expand); in PPCTargetLowering()
498 setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); in PPCTargetLowering()
543 setOperationAction(ISD::FTRUNC, MVT::v2f64, Legal); in PPCTargetLowering()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 132 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in AMDGPUTargetLowering()
234 setOperationAction(ISD::FTRUNC, MVT::f64, Custom); in AMDGPUTargetLowering()
343 setOperationAction(ISD::FTRUNC, VT, Expand); in AMDGPUTargetLowering()
539 case ISD::FTRUNC: return LowerFTRUNC(Op, DAG); in LowerOperation()
916 return DAG.getNode(ISD::FTRUNC, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
1326 fq = DAG.getNode(ISD::FTRUNC, DL, FLTTY, fq); in LowerSDIV24()
1674 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFCEIL()
1784 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFFLOOR()
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| D | SIISelLowering.cpp | 204 setOperationAction(ISD::FTRUNC, VT, Expand); in SITargetLowering()
210 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in SITargetLowering()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 780 setOperationAction(ISD::FTRUNC, MVT::f16, Expand); in initActions()
791 setOperationAction(ISD::FTRUNC, MVT::f32, Expand); in initActions()
802 setOperationAction(ISD::FTRUNC, MVT::f64, Expand); in initActions()
813 setOperationAction(ISD::FTRUNC, MVT::f128, Expand); in initActions()
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| D | BasicTargetTransformInfo.cpp | 567 case Intrinsic::trunc: ISD = ISD::FTRUNC; break; in getIntrinsicInstrCost()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 148 case ISD::FTRUNC: return "ftrunc"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 94 case ISD::FTRUNC: in ScalarizeVectorResult()
610 case ISD::FTRUNC: in SplitVectorResult()
1219 case ISD::FTRUNC: in SplitVectorOperand()
1637 case ISD::FTRUNC: in WidenVectorResult()
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| D | LegalizeFloatTypes.cpp | 97 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break; in SoftenFloatResult()
839 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break; in ExpandFloatResult()
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| D | LegalizeVectorOps.cpp | 288 case ISD::FTRUNC: in LegalizeOp()
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| D | SelectionDAGBuilder.cpp | 5111 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; in visitIntrinsicCall()
5972 if (visitUnaryFloatCall(I, ISD::FTRUNC)) in visitCall()
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| D | LegalizeDAG.cpp | 3512 case ISD::FTRUNC: in ExpandNode()
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| D | DAGCombiner.cpp | 1259 case ISD::FTRUNC: return visitFTRUNC(N); in visit()
7301 return DAG.getNode(ISD::FTRUNC, SDLoc(N), VT, N0); in visitFTRUNC()
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| D | SelectionDAG.cpp | 2732 case ISD::FTRUNC: { in getNode()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 536 fq = DAG.getNode(ISD::FTRUNC, DL, FLTTY, fq); in LowerSDIV24()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 536 fq = DAG.getNode(ISD::FTRUNC, DL, FLTTY, fq); in LowerSDIV24()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1973 case ISD::FTRUNC: { in SelectLIBM()
3008 case ISD::FTRUNC: in Select()
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| D | AArch64ISelLowering.cpp | 174 setOperationAction(ISD::FTRUNC, MVT::f128, Expand); in AArch64TargetLowering()
289 setOperationAction(ISD::FTRUNC, Ty, Legal); in AArch64TargetLowering()
408 setOperationAction(ISD::FTRUNC, MVT::v1f64, Expand); in AArch64TargetLowering()
471 setOperationAction(ISD::FTRUNC, Ty, Legal); in AArch64TargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 381 def ftrunc : SDNode<"ISD::FTRUNC" , SDTFPUnaryOp>;
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 784 setOperationAction(ISD::FTRUNC, MVT::f80, Expand); in resetOperationActions()
837 setOperationAction(ISD::FTRUNC, VT, Expand); in resetOperationActions()
1061 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in resetOperationActions()
1066 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in resetOperationActions()
1072 setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); in resetOperationActions()
1077 setOperationAction(ISD::FTRUNC, MVT::v2f64, Legal); in resetOperationActions()
1155 setOperationAction(ISD::FTRUNC, MVT::v8f32, Legal); in resetOperationActions()
1168 setOperationAction(ISD::FTRUNC, MVT::v4f64, Legal); in resetOperationActions()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 471 setOperationAction(ISD::FTRUNC, MVT::v2f64, Expand); in ARMTargetLowering()
488 setOperationAction(ISD::FTRUNC, MVT::v4f32, Expand); in ARMTargetLowering()
505 setOperationAction(ISD::FTRUNC, MVT::v2f32, Expand); in ARMTargetLowering()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 259 setOperationAction(ISD::FTRUNC, VT, Legal); in SystemZTargetLowering()
|