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/external/llvm/test/CodeGen/ARM/
Dstruct_byval_arm_t1_t2.ll48 ;ARM-LABEL: test_A_1:
49 ;THUMB2-LABEL: test_A_1:
50 ;NO_NEON-LABEL:test_A_1:
51 ;THUMB1-LABEL: test_A_1:
52 ;T1POST-LABEL: test_A_1:
69 ;ARM-LABEL: test_A_2:
70 ;THUMB2-LABEL: test_A_2:
71 ;NO_NEON-LABEL:test_A_2:
72 ;THUMB1-LABEL: test_A_2:
73 ;T1POST-LABEL: test_A_2:
[all …]
Dfpconv.ll5 ;CHECK-VFP-LABEL: f1:
7 ;CHECK-LABEL: f1:
15 ;CHECK-VFP-LABEL: f2:
17 ;CHECK-LABEL: f2:
25 ;CHECK-VFP-LABEL: f3:
27 ;CHECK-LABEL: f3:
35 ;CHECK-VFP-LABEL: f4:
37 ;CHECK-LABEL: f4:
45 ;CHECK-VFP-LABEL: f5:
47 ;CHECK-LABEL: f5:
[all …]
/external/llvm/test/CodeGen/X86/
Dcmov-fp.ll12 ; SSE-LABEL: test1:
15 ; NOSSE2-LABEL: test1:
18 ; NOSSE1-LABEL: test1:
21 ; NOCMOV-LABEL: test1:
31 ; SSE-LABEL: test2:
34 ; NOSSE2-LABEL: test2:
37 ; NOSSE1-LABEL: test2:
40 ; NOCMOV-LABEL: test2:
49 ; SSE-LABEL: test3:
52 ; NOSSE2-LABEL: test3:
[all …]
Dtls-models.ll28 ; X64-LABEL: f1:
30 ; X32-LABEL: f1:
32 ; X64_PIC-LABEL: f1:
34 ; X32_PIC-LABEL: f1:
36 ; DARWIN-LABEL: f1:
45 ; X64-LABEL: f2:
47 ; X32-LABEL: f2:
49 ; X64_PIC-LABEL: f2:
51 ; X32_PIC-LABEL: f2:
53 ; DARWIN-LABEL: f2:
[all …]
Dfast-isel-cmp.ll5 ; SDAG-LABEL: fcmp_oeq
9 ; FAST-LABEL: fcmp_oeq
19 ; SDAG-LABEL: fcmp_ogt
29 ; SDAG-LABEL: fcmp_oge
32 ; FAST-LABEL: fcmp_oge
40 ; SDAG-LABEL: fcmp_olt
43 ; FAST-LABEL: fcmp_olt
51 ; SDAG-LABEL: fcmp_ole
54 ; FAST-LABEL: fcmp_ole
62 ; SDAG-LABEL: fcmp_one
[all …]
Dsse-minmax.ll15 ; CHECK-LABEL: ogt:
18 ; UNSAFE-LABEL: ogt:
21 ; FINITE-LABEL: ogt:
30 ; CHECK-LABEL: olt:
33 ; UNSAFE-LABEL: olt:
36 ; FINITE-LABEL: olt:
45 ; CHECK-LABEL: ogt_inverse:
49 ; UNSAFE-LABEL: ogt_inverse:
52 ; FINITE-LABEL: ogt_inverse:
62 ; CHECK-LABEL: olt_inverse:
[all …]
Dviabs.ll7 ; SSE2-LABEL: test1:
14 ; SSSE3-LABEL: test1:
18 ; AVX2-LABEL: test1:
22 ; AVX512-LABEL: test1:
32 ; SSE2-LABEL: test2:
39 ; SSSE3-LABEL: test2:
43 ; AVX2-LABEL: test2:
47 ; AVX512-LABEL: test2:
57 ; SSE2-LABEL: test3:
64 ; SSSE3-LABEL: test3:
[all …]
Dtls.ll17 ; X32_LINUX-LABEL: f1:
20 ; X64_LINUX-LABEL: f1:
23 ; X32_WIN-LABEL: f1:
29 ; X64_WIN-LABEL: f1:
35 ; MINGW32-LABEL: _f1:
48 ; X32_LINUX-LABEL: f2:
52 ; X64_LINUX-LABEL: f2:
56 ; X32_WIN-LABEL: f2:
62 ; X64_WIN-LABEL: f2:
68 ; MINGW32-LABEL: _f2:
[all …]
Dsibcall.ll6 ; 32-LABEL: t1:
9 ; 64-LABEL: t1:
19 ; 32-LABEL: t2:
22 ; 64-LABEL: t2:
32 ; 32-LABEL: t3:
35 ; 64-LABEL: t3:
45 ; 32-LABEL: t4:
49 ; 64-LABEL: t4:
58 ; 32-LABEL: t5:
62 ; 64-LABEL: t5:
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dbranch-04.ll7 ; CHECK-LABEL: f1:
9 ; CHECK: .L[[LABEL:.*]]:
11 ; CHECK-NEXT: je .L[[LABEL]]
22 ; CHECK-LABEL: f2:
24 ; CHECK: .L[[LABEL:.*]]:
26 ; CHECK-NEXT: jlh .L[[LABEL]]
37 ; CHECK-LABEL: f3:
39 ; CHECK: .L[[LABEL:.*]]:
41 ; CHECK-NEXT: jle .L[[LABEL]]
52 ; CHECK-LABEL: f4:
[all …]
Dbranch-06.ll9 ; CHECK-LABEL: f1:
11 ; CHECK: .L[[LABEL:.*]]:
12 ; CHECK: crje %r2, {{%r[0-9]+}}, .L[[LABEL]]
23 ; CHECK-LABEL: f2:
25 ; CHECK: .L[[LABEL:.*]]:
26 ; CHECK: crjlh %r2, {{%r[0-9]+}}, .L[[LABEL]]
37 ; CHECK-LABEL: f3:
39 ; CHECK: .L[[LABEL:.*]]:
40 ; CHECK: crjle %r2, {{%r[0-9]+}}, .L[[LABEL]]
51 ; CHECK-LABEL: f4:
[all …]
Dcond-store-02.ll10 ; CHECK-LABEL: f1:
12 ; CHECK: jl [[LABEL:[^ ]*]]
15 ; CHECK: [[LABEL]]:
26 ; CHECK-LABEL: f2:
28 ; CHECK: jhe [[LABEL:[^ ]*]]
31 ; CHECK: [[LABEL]]:
43 ; CHECK-LABEL: f3:
45 ; CHECK: jl [[LABEL:[^ ]*]]
48 ; CHECK: [[LABEL]]:
61 ; CHECK-LABEL: f4:
[all …]
Dcond-store-01.ll10 ; CHECK-LABEL: f1:
12 ; CHECK: jl [[LABEL:[^ ]*]]
15 ; CHECK: [[LABEL]]:
26 ; CHECK-LABEL: f2:
28 ; CHECK: jhe [[LABEL:[^ ]*]]
31 ; CHECK: [[LABEL]]:
43 ; CHECK-LABEL: f3:
45 ; CHECK: jl [[LABEL:[^ ]*]]
48 ; CHECK: [[LABEL]]:
61 ; CHECK-LABEL: f4:
[all …]
Dcond-store-03.ll9 ; CHECK-LABEL: f1:
11 ; CHECK: jl [[LABEL:[^ ]*]]
14 ; CHECK: [[LABEL]]:
25 ; CHECK-LABEL: f2:
27 ; CHECK: jhe [[LABEL:[^ ]*]]
30 ; CHECK: [[LABEL]]:
42 ; CHECK-LABEL: f3:
44 ; CHECK: jl [[LABEL:[^ ]*]]
47 ; CHECK: [[LABEL]]:
60 ; CHECK-LABEL: f4:
[all …]
Dbranch-02.ll8 ; CHECK-LABEL: f1:
10 ; CHECK: .L[[LABEL:.*]]:
12 ; CHECK-NEXT: je .L[[LABEL]]
23 ; CHECK-LABEL: f2:
25 ; CHECK: .L[[LABEL:.*]]:
27 ; CHECK-NEXT: jlh .L[[LABEL]]
38 ; CHECK-LABEL: f3:
40 ; CHECK: .L[[LABEL:.*]]:
42 ; CHECK-NEXT: jle .L[[LABEL]]
53 ; CHECK-LABEL: f4:
[all …]
Dcond-store-06.ll9 ; CHECK-LABEL: f1:
11 ; CHECK: jl [[LABEL:[^ ]*]]
14 ; CHECK: [[LABEL]]:
25 ; CHECK-LABEL: f2:
27 ; CHECK: jhe [[LABEL:[^ ]*]]
30 ; CHECK: [[LABEL]]:
41 ; CHECK-LABEL: f3:
43 ; CHECK: jl [[LABEL:[^ ]*]]
46 ; CHECK: [[LABEL]]:
58 ; CHECK-LABEL: f4:
[all …]
Dcond-store-05.ll9 ; CHECK-LABEL: f1:
11 ; CHECK: jl [[LABEL:[^ ]*]]
14 ; CHECK: [[LABEL]]:
25 ; CHECK-LABEL: f2:
27 ; CHECK: jhe [[LABEL:[^ ]*]]
30 ; CHECK: [[LABEL]]:
41 ; CHECK-LABEL: f3:
43 ; CHECK: jl [[LABEL:[^ ]*]]
46 ; CHECK: [[LABEL]]:
58 ; CHECK-LABEL: f4:
[all …]
Dcond-store-04.ll9 ; CHECK-LABEL: f1:
11 ; CHECK: jl [[LABEL:[^ ]*]]
14 ; CHECK: [[LABEL]]:
25 ; CHECK-LABEL: f2:
27 ; CHECK: jhe [[LABEL:[^ ]*]]
30 ; CHECK: [[LABEL]]:
41 ; CHECK-LABEL: f3:
43 ; CHECK: jl [[LABEL:[^ ]*]]
46 ; CHECK: [[LABEL]]:
59 ; CHECK-LABEL: f4:
[all …]
/external/llvm/test/CodeGen/AArch64/
Dneon-mov.ll4 ; CHECK-LABEL: movi8b:
10 ; CHECK-LABEL: movi16b:
16 ; CHECK-LABEL: movi2s_lsl0:
22 ; CHECK-LABEL: movi2s_lsl8:
28 ; CHECK-LABEL: movi2s_lsl16:
35 ; CHECK-LABEL: movi2s_lsl24:
41 ; CHECK-LABEL: movi4s_lsl0:
47 ; CHECK-LABEL: movi4s_lsl8:
53 ; CHECK-LABEL: movi4s_lsl16:
60 ; CHECK-LABEL: movi4s_lsl24:
[all …]
Dmovw-consts.ll4 ; CHECK-LABEL: test0:
11 ; CHECK-LABEL: test1:
17 ; CHECK-LABEL: test2:
23 ; CHECK-LABEL: test3:
29 ; CHECK-LABEL: test4:
35 ; CHECK-LABEL: test5:
41 ; CHECK-LABEL: test6:
47 ; CHECK-LABEL: test7:
55 ; CHECK-LABEL: test8:
61 ; CHECK-LABEL: test9:
[all …]
Darm64-movi.ll9 ; CHECK-LABEL: test64_32_rot0:
16 ; CHECK-LABEL: test64_32_rot2:
23 ; CHECK-LABEL: test64_4_rot3:
30 ; CHECK-LABEL: test32_32_rot16:
37 ; CHECK-LABEL: test32_2_rot1:
47 ; CHECK-LABEL: movz:
53 ; CHECK-LABEL: movz_3movk:
62 ; CHECK-LABEL: movz_movk_skip1:
69 ; CHECK-LABEL: movz_skip1_movk:
80 ; CHECK-LABEL: movn:
[all …]
Darm64-atomic-128.ll6 ; CHECK-LABEL: val_compare_and_swap:
7 ; CHECK: [[LABEL:.?LBB[0-9]+_[0-9]+]]:
14 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
22 ; CHECK-LABEL: fetch_and_nand:
23 ; CHECK: [[LABEL:.?LBB[0-9]+_[0-9]+]]:
30 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
40 ; CHECK-LABEL: fetch_and_or:
41 ; CHECK: [[LABEL:.?LBB[0-9]+_[0-9]+]]:
46 ; CHECK: cbnz [[SCRATCH_RES]], [[LABEL]]
56 ; CHECK-LABEL: fetch_and_add:
[all …]
/external/llvm/test/CodeGen/SPARC/
Dfloat.ll6 ; V8-LABEL: test_neg:
10 ; V8-UNOPT-LABEL: test_neg:
16 ; V9-LABEL: test_neg:
19 ; SPARC64-LABEL: test_neg:
29 ; V8-LABEL: test_abs:
32 ; V8-UNOPT-LABEL: test_abs:
38 ; V9-LABEL: test_abs:
42 ; SPARC64-LABEL: test_abs:
55 ; V8-LABEL: test_v9_floatreg:
61 ; V9-LABEL: test_v9_floatreg:
[all …]
/external/llvm/test/Transforms/ConstProp/
Dloads.ll16 ; LE-LABEL: @test1(
20 ; BE-LABEL: @test1(
31 ; LE-LABEL: @test2(
35 ; BE-LABEL: @test2(
45 ; LE-LABEL: @test3(
49 ; BE-LABEL: @test3(
59 ; LE-LABEL: @test4(
63 ; BE-LABEL: @test4(
73 ; LE-LABEL: @test6(
77 ; BE-LABEL: @test6(
[all …]
/external/llvm/test/MC/ARM/
Dldr-pseudo-darwin.s16 @ CHECK-LABEL: f3:
23 @ CHECK-LABEL: f4:
38 @ CHECK-LABEL: f5:
60 @ CHECK-LABEL: f6:
69 @ CHECK-LABEL: f7:
76 @ CHECK-LABEL: f8:
90 @ CHECK-LABEL: f9:
97 @ CHECK-LABEL: f10:
104 @ CHECK-LABEL: f11:
109 @ CHECK-LABEL: f12:
[all …]

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