1; RUN: llc < %s -march=x86-64 -mcpu=x86-64 | FileCheck %s -check-prefix=SSE2 2; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s -check-prefix=SSSE3 3; RUN: llc < %s -march=x86-64 -mcpu=core-avx2 | FileCheck %s -check-prefix=AVX2 4; RUN: llc < %s -march=x86-64 -mcpu=knl | FileCheck %s -check-prefix=AVX512 5 6define <4 x i32> @test1(<4 x i32> %a) nounwind { 7; SSE2-LABEL: test1: 8; SSE2: movdqa 9; SSE2: psrad $31 10; SSE2-NEXT: padd 11; SSE2-NEXT: pxor 12; SSE2-NEXT: ret 13 14; SSSE3-LABEL: test1: 15; SSSE3: pabsd 16; SSSE3-NEXT: ret 17 18; AVX2-LABEL: test1: 19; AVX2: vpabsd 20; AVX2-NEXT: ret 21 22; AVX512-LABEL: test1: 23; AVX512: vpabsd 24; AVX512-NEXT: ret 25 %tmp1neg = sub <4 x i32> zeroinitializer, %a 26 %b = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1> 27 %abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg 28 ret <4 x i32> %abs 29} 30 31define <4 x i32> @test2(<4 x i32> %a) nounwind { 32; SSE2-LABEL: test2: 33; SSE2: movdqa 34; SSE2: psrad $31 35; SSE2-NEXT: padd 36; SSE2-NEXT: pxor 37; SSE2-NEXT: ret 38 39; SSSE3-LABEL: test2: 40; SSSE3: pabsd 41; SSSE3-NEXT: ret 42 43; AVX2-LABEL: test2: 44; AVX2: vpabsd 45; AVX2-NEXT: ret 46 47; AVX512-LABEL: test2: 48; AVX512: vpabsd 49; AVX512-NEXT: ret 50 %tmp1neg = sub <4 x i32> zeroinitializer, %a 51 %b = icmp sge <4 x i32> %a, zeroinitializer 52 %abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg 53 ret <4 x i32> %abs 54} 55 56define <8 x i16> @test3(<8 x i16> %a) nounwind { 57; SSE2-LABEL: test3: 58; SSE2: movdqa 59; SSE2: psraw $15 60; SSE2-NEXT: padd 61; SSE2-NEXT: pxor 62; SSE2-NEXT: ret 63 64; SSSE3-LABEL: test3: 65; SSSE3: pabsw 66; SSSE3-NEXT: ret 67 68; AVX2-LABEL: test3: 69; AVX2: vpabsw 70; AVX2-NEXT: ret 71 72; AVX512-LABEL: test3: 73; AVX512: vpabsw 74; AVX512-NEXT: ret 75 %tmp1neg = sub <8 x i16> zeroinitializer, %a 76 %b = icmp sgt <8 x i16> %a, zeroinitializer 77 %abs = select <8 x i1> %b, <8 x i16> %a, <8 x i16> %tmp1neg 78 ret <8 x i16> %abs 79} 80 81define <16 x i8> @test4(<16 x i8> %a) nounwind { 82; SSE2-LABEL: test4: 83; SSE2: pxor 84; SSE2: pcmpgtb 85; SSE2-NEXT: padd 86; SSE2-NEXT: pxor 87; SSE2-NEXT: ret 88 89; SSSE3-LABEL: test4: 90; SSSE3: pabsb 91; SSSE3-NEXT: ret 92 93; AVX2-LABEL: test4: 94; AVX2: vpabsb 95; AVX2-NEXT: ret 96 97; AVX512-LABEL: test4: 98; AVX512: vpabsb 99; AVX512-NEXT: ret 100 %tmp1neg = sub <16 x i8> zeroinitializer, %a 101 %b = icmp slt <16 x i8> %a, zeroinitializer 102 %abs = select <16 x i1> %b, <16 x i8> %tmp1neg, <16 x i8> %a 103 ret <16 x i8> %abs 104} 105 106define <4 x i32> @test5(<4 x i32> %a) nounwind { 107; SSE2-LABEL: test5: 108; SSE2: movdqa 109; SSE2: psrad $31 110; SSE2-NEXT: padd 111; SSE2-NEXT: pxor 112; SSE2-NEXT: ret 113 114; SSSE3-LABEL: test5: 115; SSSE3: pabsd 116; SSSE3-NEXT: ret 117 118; AVX2-LABEL: test5: 119; AVX2: vpabsd 120; AVX2-NEXT: ret 121 122; AVX512-LABEL: test5: 123; AVX512: vpabsd 124; AVX512-NEXT: ret 125 %tmp1neg = sub <4 x i32> zeroinitializer, %a 126 %b = icmp sle <4 x i32> %a, zeroinitializer 127 %abs = select <4 x i1> %b, <4 x i32> %tmp1neg, <4 x i32> %a 128 ret <4 x i32> %abs 129} 130 131define <8 x i32> @test6(<8 x i32> %a) nounwind { 132; SSSE3-LABEL: test6: 133; SSSE3: pabsd 134; SSSE3: pabsd 135; SSSE3-NEXT: ret 136 137; AVX2-LABEL: test6: 138; AVX2: vpabsd {{.*}}%ymm 139; AVX2-NEXT: ret 140 141; AVX512-LABEL: test6: 142; AVX512: vpabsd {{.*}}%ymm 143; AVX512-NEXT: ret 144 %tmp1neg = sub <8 x i32> zeroinitializer, %a 145 %b = icmp sgt <8 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 146 %abs = select <8 x i1> %b, <8 x i32> %a, <8 x i32> %tmp1neg 147 ret <8 x i32> %abs 148} 149 150define <8 x i32> @test7(<8 x i32> %a) nounwind { 151; SSSE3-LABEL: test7: 152; SSSE3: pabsd 153; SSSE3: pabsd 154; SSSE3-NEXT: ret 155 156; AVX2-LABEL: test7: 157; AVX2: vpabsd {{.*}}%ymm 158; AVX2-NEXT: ret 159 160; AVX512-LABEL: test7: 161; AVX512: vpabsd {{.*}}%ymm 162; AVX512-NEXT: ret 163 %tmp1neg = sub <8 x i32> zeroinitializer, %a 164 %b = icmp sge <8 x i32> %a, zeroinitializer 165 %abs = select <8 x i1> %b, <8 x i32> %a, <8 x i32> %tmp1neg 166 ret <8 x i32> %abs 167} 168 169define <16 x i16> @test8(<16 x i16> %a) nounwind { 170; SSSE3-LABEL: test8: 171; SSSE3: pabsw 172; SSSE3: pabsw 173; SSSE3-NEXT: ret 174 175; AVX2-LABEL: test8: 176; AVX2: vpabsw {{.*}}%ymm 177; AVX2-NEXT: ret 178 179; AVX512-LABEL: test8: 180; AVX512: vpabsw {{.*}}%ymm 181; AVX512-NEXT: ret 182 %tmp1neg = sub <16 x i16> zeroinitializer, %a 183 %b = icmp sgt <16 x i16> %a, zeroinitializer 184 %abs = select <16 x i1> %b, <16 x i16> %a, <16 x i16> %tmp1neg 185 ret <16 x i16> %abs 186} 187 188define <32 x i8> @test9(<32 x i8> %a) nounwind { 189; SSSE3-LABEL: test9: 190; SSSE3: pabsb 191; SSSE3: pabsb 192; SSSE3-NEXT: ret 193 194; AVX2-LABEL: test9: 195; AVX2: vpabsb {{.*}}%ymm 196; AVX2-NEXT: ret 197 198; AVX512-LABEL: test9: 199; AVX512: vpabsb {{.*}}%ymm 200; AVX512-NEXT: ret 201 %tmp1neg = sub <32 x i8> zeroinitializer, %a 202 %b = icmp slt <32 x i8> %a, zeroinitializer 203 %abs = select <32 x i1> %b, <32 x i8> %tmp1neg, <32 x i8> %a 204 ret <32 x i8> %abs 205} 206 207define <8 x i32> @test10(<8 x i32> %a) nounwind { 208; SSSE3-LABEL: test10: 209; SSSE3: pabsd 210; SSSE3: pabsd 211; SSSE3-NEXT: ret 212 213; AVX2-LABEL: test10: 214; AVX2: vpabsd {{.*}}%ymm 215; AVX2-NEXT: ret 216 217; AVX512-LABEL: test10: 218; AVX512: vpabsd {{.*}}%ymm 219; AVX512-NEXT: ret 220 %tmp1neg = sub <8 x i32> zeroinitializer, %a 221 %b = icmp sle <8 x i32> %a, zeroinitializer 222 %abs = select <8 x i1> %b, <8 x i32> %tmp1neg, <8 x i32> %a 223 ret <8 x i32> %abs 224} 225 226define <16 x i32> @test11(<16 x i32> %a) nounwind { 227; AVX2-LABEL: test11: 228; AVX2: vpabsd 229; AVX2: vpabsd 230; AVX2-NEXT: ret 231 232; AVX512-LABEL: test11: 233; AVX512: vpabsd {{.*}}%zmm 234; AVX512-NEXT: ret 235 %tmp1neg = sub <16 x i32> zeroinitializer, %a 236 %b = icmp sle <16 x i32> %a, zeroinitializer 237 %abs = select <16 x i1> %b, <16 x i32> %tmp1neg, <16 x i32> %a 238 ret <16 x i32> %abs 239} 240 241define <8 x i64> @test12(<8 x i64> %a) nounwind { 242; AVX2-LABEL: test12: 243; AVX2: vpxor 244; AVX2: vpxor 245; AVX2-NEXT: ret 246 247; AVX512-LABEL: test12: 248; AVX512: vpabsq {{.*}}%zmm 249; AVX512-NEXT: ret 250 %tmp1neg = sub <8 x i64> zeroinitializer, %a 251 %b = icmp sle <8 x i64> %a, zeroinitializer 252 %abs = select <8 x i1> %b, <8 x i64> %tmp1neg, <8 x i64> %a 253 ret <8 x i64> %abs 254} 255 256define <8 x i64> @test13(<8 x i64>* %a.ptr) nounwind { 257; AVX2-LABEL: test13: 258; AVX2: vpxor 259; AVX2: vpxor 260; AVX2-NEXT: ret 261 262; AVX512-LABEL: test13: 263; AVX512: vpabsq (% 264; AVX512-NEXT: ret 265 %a = load <8 x i64>* %a.ptr, align 8 266 %tmp1neg = sub <8 x i64> zeroinitializer, %a 267 %b = icmp sle <8 x i64> %a, zeroinitializer 268 %abs = select <8 x i1> %b, <8 x i64> %tmp1neg, <8 x i64> %a 269 ret <8 x i64> %abs 270} 271