/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 202 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(1)); in PromoteIntRes_AtomicCmpSwap() local 207 SVT = NVT; in PromoteIntRes_AtomicCmpSwap() 295 EVT NVT = Op.getValueType(); in PromoteIntRes_BSWAP() local 298 unsigned DiffBits = NVT.getScalarSizeInBits() - OVT.getScalarSizeInBits(); in PromoteIntRes_BSWAP() 299 return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op), in PromoteIntRes_BSWAP() 300 DAG.getConstant(DiffBits, TLI.getShiftAmountTy(NVT))); in PromoteIntRes_BSWAP() 343 EVT NVT = Op.getValueType(); in PromoteIntRes_CTLZ() local 344 Op = DAG.getNode(N->getOpcode(), dl, NVT, Op); in PromoteIntRes_CTLZ() 347 ISD::SUB, dl, NVT, Op, in PromoteIntRes_CTLZ() 348 DAG.getConstant(NVT.getScalarSizeInBits() - OVT.getScalarSizeInBits(), in PromoteIntRes_CTLZ() [all …]
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D | LegalizeFloatTypes.cpp | 145 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in SoftenFloatRes_FABS() local 146 unsigned Size = NVT.getSizeInBits(); in SoftenFloatRes_FABS() 151 SDValue Mask = DAG.getConstant(API, NVT); in SoftenFloatRes_FABS() 153 return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask); in SoftenFloatRes_FABS() 157 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in SoftenFloatRes_FADD() local 166 NVT, Ops, 2, false, SDLoc(N)).first; in SoftenFloatRes_FADD() 170 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in SoftenFloatRes_FCEIL() local 178 NVT, &Op, 1, false, SDLoc(N)).first; in SoftenFloatRes_FCEIL() 224 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in SoftenFloatRes_FCOS() local 232 NVT, &Op, 1, false, SDLoc(N)).first; in SoftenFloatRes_FCOS() [all …]
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D | LegalizeTypesGeneric.cpp | 101 EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in ExpandRes_BITCAST() local 104 while (!isTypeLegal(NVT)) { in ExpandRes_BITCAST() 111 NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in ExpandRes_BITCAST() 114 if (isTypeLegal(NVT)) { in ExpandRes_BITCAST() 115 SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp); in ExpandRes_BITCAST() 252 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT); in ExpandRes_NormalLoad() local 261 assert(NVT.isByteSized() && "Expanded type not byte sized!"); in ExpandRes_NormalLoad() 263 Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(), in ExpandRes_NormalLoad() 268 unsigned IncrementSize = NVT.getSizeInBits() / 8; in ExpandRes_NormalLoad() 271 Hi = DAG.getLoad(NVT, dl, Chain, Ptr, in ExpandRes_NormalLoad() [all …]
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D | LegalizeDAG.cpp | 95 SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, SDLoc dl, 189 SelectionDAGLegalize::ShuffleWithNarrowerEltType(EVT NVT, EVT VT, SDLoc dl, in ShuffleWithNarrowerEltType() argument 193 unsigned NumDestElts = NVT.getVectorNumElements(); in ShuffleWithNarrowerEltType() 199 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]); in ShuffleWithNarrowerEltType() 212 assert(TLI.isShuffleMaskLegal(NewMask, NVT) && "Shuffle not legal?"); in ShuffleWithNarrowerEltType() 213 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]); in ShuffleWithNarrowerEltType() 750 MVT NVT = TLI.getTypeToPromoteTo(ISD::STORE, VT); in LegalizeStoreOps() local 751 assert(NVT.getSizeInBits() == VT.getSizeInBits() && in LegalizeStoreOps() 753 Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value); in LegalizeStoreOps() 774 EVT NVT = EVT::getIntegerVT(*DAG.getContext(), in LegalizeStoreOps() local [all …]
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D | LegalizeTypes.cpp | 968 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), Pair.getValueType()); in GetPairElements() local 969 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NVT, Pair, in GetPairElements() 971 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NVT, Pair, in GetPairElements() 996 EVT NVT = EVT::getIntegerVT(*DAG.getContext(), in JoinIntegers() local 999 Lo = DAG.getNode(ISD::ZERO_EXTEND, dlLo, NVT, Lo); in JoinIntegers() 1000 Hi = DAG.getNode(ISD::ANY_EXTEND, dlHi, NVT, Hi); in JoinIntegers() 1001 Hi = DAG.getNode(ISD::SHL, dlHi, NVT, Hi, in JoinIntegers() 1003 return DAG.getNode(ISD::OR, dlHi, NVT, Lo, Hi); in JoinIntegers()
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D | LegalizeVectorOps.cpp | 362 MVT NVT = TLI.getTypeToPromoteTo(Op.getOpcode(), VT); in Promote() local 368 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); in Promote() 373 Op = DAG.getNode(Op.getOpcode(), dl, NVT, Operands); in Promote() 393 EVT NVT = VT.widenIntegerVectorElementType(*DAG.getContext()); in PromoteINT_TO_FP() local 394 assert(NVT.isSimple() && "Promoting to a non-simple vector type!"); in PromoteINT_TO_FP() 402 Operands[j] = DAG.getNode(Opc, dl, NVT, Op.getOperand(j)); in PromoteINT_TO_FP()
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D | LegalizeVectorTypes.cpp | 359 EVT NVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_VSETCC() local 381 return DAG.getNode(ExtendCode, DL, NVT, Res); in ScalarizeVecRes_VSETCC() 3047 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) { in ModifyToType() argument 3051 assert(InVT.getVectorElementType() == NVT.getVectorElementType() && in ModifyToType() 3056 if (InVT == NVT) in ModifyToType() 3060 unsigned WidenNumElts = NVT.getVectorNumElements(); in ModifyToType() 3069 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, Ops); in ModifyToType() 3073 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp, in ModifyToType() 3078 EVT EltVT = NVT.getVectorElementType(); in ModifyToType() 3088 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, Ops); in ModifyToType()
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D | DAGCombiner.cpp | 6007 EVT NVT = EVT::getVectorVT(*DAG.getContext(), TrTy, SizeRatio * NumElem); in visitTRUNCATE() local 6008 assert(NVT.getSizeInBits() == VecTy.getSizeInBits() && "Invalid Size"); in visitTRUNCATE() 6011 if (isa<ConstantSDNode>(EltNo) && isTypeLegal(NVT)) { in visitTRUNCATE() 6017 NVT, N0.getOperand(0)); in visitTRUNCATE() 9866 EVT NVT = N->getValueType(0); in visitEXTRACT_VECTOR_ELT() local 9873 if (InOp.getValueType() != NVT) { in visitEXTRACT_VECTOR_ELT() 9874 assert(InOp.getValueType().isInteger() && NVT.isInteger()); in visitEXTRACT_VECTOR_ELT() 9875 return DAG.getSExtOrTrunc(InOp, SDLoc(InVec), NVT); in visitEXTRACT_VECTOR_ELT() 9899 return DAG.getUNDEF(NVT); in visitEXTRACT_VECTOR_ELT() 9912 if (InOp.getValueType() != NVT) { in visitEXTRACT_VECTOR_ELT() [all …]
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D | SelectionDAG.cpp | 3980 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); in getMemcpyLoadsAndStores() local 3981 assert(NVT.bitsGE(VT)); in getMemcpyLoadsAndStores() 3982 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, in getMemcpyLoadsAndStores()
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 624 MVT NVT = VT; in getTypeToPromoteTo() local 626 NVT = (MVT::SimpleValueType)(NVT.SimpleTy+1); in getTypeToPromoteTo() 627 assert(NVT.isInteger() == VT.isInteger() && NVT != MVT::isVoid && in getTypeToPromoteTo() 629 } while (!isTypeLegal(NVT) || in getTypeToPromoteTo() 630 getOperationAction(Op, NVT) == Promote); in getTypeToPromoteTo() 631 return NVT; in getTypeToPromoteTo() 1634 MVT NVT = TransformToType[SVT.SimpleTy]; in getTypeConversion() local 1639 ValueTypeActions.getTypeAction(NVT) != TypePromoteInteger) in getTypeConversion() 1648 return LegalizeKind(LA, NVT); in getTypeConversion() 1657 EVT NVT = VT.getRoundIntegerType(Context); in getTypeConversion() local [all …]
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/external/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 196 SDNode *SelectAtomicLoadArith(SDNode *Node, MVT NVT); 1718 enum AtomicOpc &Op, MVT NVT, in getAtomicLoadArithTargetConstant() argument 1739 return CurDAG->getTargetConstant(CNVal, NVT); in getAtomicLoadArithTargetConstant() 1752 if (Val.getOpcode() == ISD::TRUNCATE && NVT == MVT::i16 && in getAtomicLoadArithTargetConstant() 1757 return CurDAG->getTargetExtractSubreg(X86::sub_16bit, dl, NVT, in getAtomicLoadArithTargetConstant() 1765 SDNode *X86DAGToDAGISel::SelectAtomicLoadArith(SDNode *Node, MVT NVT) { in SelectAtomicLoadArith() argument 1800 Val = getAtomicLoadArithTargetConstant(CurDAG, dl, Op, NVT, Val); in SelectAtomicLoadArith() 1805 switch (NVT.SimpleTy) { in SelectAtomicLoadArith() 1846 dl, NVT), 0); in SelectAtomicLoadArith() 2059 MVT NVT = Node->getSimpleValueType(0); in Select() local [all …]
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D | X86ISelLowering.cpp | 5625 EVT NVT = EVT::getVectorVT(*DAG.getContext(), PVT, NumElems); in LowerAsSplatVectorLoad() local 5626 SDValue V1 = DAG.getLoad(NVT, dl, Chain, Ptr, in LowerAsSplatVectorLoad() 5634 return DAG.getVectorShuffle(NVT, dl, V1, DAG.getUNDEF(NVT), &Mask[0]); in LowerAsSplatVectorLoad() 8659 MVT NVT = MVT::getVectorVT(EltVT, NumLaneElems); in LowerVECTOR_SHUFFLE_256() local 8733 Output[l] = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, SVOps); in LowerVECTOR_SHUFFLE_256() 8736 Output[l] = DAG.getUNDEF(NVT); in LowerVECTOR_SHUFFLE_256() 8742 SDValue Op1 = (InputUsed[1] < 0) ? DAG.getUNDEF(NVT) : in LowerVECTOR_SHUFFLE_256() 8746 Output[l] = DAG.getVectorShuffle(NVT, dl, Op0, Op1, &Mask[0]); in LowerVECTOR_SHUFFLE_256() 9153 MVT NVT = MVT::getVectorVT(NeVT, NumElems >> Shift); in LowerVectorIntExtend() local 9155 if (!DAG.getTargetLoweringInfo().isTypeLegal(NVT)) in LowerVectorIntExtend() [all …]
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 1151 MVT NVT = VT.getPow2VectorType(); in computeRegisterProperties() local 1152 if (NVT == VT) { in computeRegisterProperties() 1160 TransformToType[i] = NVT; in computeRegisterProperties()
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/external/llvm/docs/ |
D | WritingAnLLVMBackend.rst | 1264 MVT::ValueType NVT = N.getNode()->getValueType(0); 1267 switch (NVT) {
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