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Searched refs:Pred1 (Results 1 – 21 of 21) sorted by relevance

/external/llvm/lib/Transforms/Utils/
DBasicBlockUtils.cpp744 BasicBlock *Pred1 = nullptr; in GetIfCondition() local
750 Pred1 = SomePHI->getIncomingBlock(0); in GetIfCondition()
756 Pred1 = *PI++; in GetIfCondition()
766 BranchInst *Pred1Br = dyn_cast<BranchInst>(Pred1->getTerminator()); in GetIfCondition()
781 std::swap(Pred1, Pred2); in GetIfCondition()
796 IfTrue = Pred1; in GetIfCondition()
801 IfFalse = Pred1; in GetIfCondition()
814 BasicBlock *CommonPred = Pred1->getSinglePredecessor(); in GetIfCondition()
823 if (BI->getSuccessor(0) == Pred1) { in GetIfCondition()
824 IfTrue = Pred1; in GetIfCondition()
[all …]
DSimplifyCFG.cpp1143 BasicBlock *Pred1 = *PI++; in SinkThenElseCodeToEnd() local
1146 BasicBlock *BB2 = (Pred0 == BB1) ? Pred1 : Pred0; in SinkThenElseCodeToEnd()
/external/mesa3d/src/gallium/drivers/radeon/
DR600InstrInfo.h97 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DAMDGPUInstrInfo.h117 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DAMDGPUInstrInfo.cpp214 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
DR600InstrInfo.cpp447 R600InstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DR600InstrInfo.h97 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DAMDGPUInstrInfo.h117 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DAMDGPUInstrInfo.cpp214 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
DR600InstrInfo.cpp447 R600InstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/external/llvm/lib/Target/R600/
DAMDGPUInstrInfo.h132 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DR600InstrInfo.h192 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DAMDGPUInstrInfo.cpp245 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
DR600InstrInfo.cpp1007 R600InstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h207 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DPPCInstrInfo.cpp1199 const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
1201 assert(Pred1.size() == 2 && "Invalid PPC first predicate"); in SubsumesPredicate()
1204 if (Pred1[1].getReg() == PPC::CTR8 || Pred1[1].getReg() == PPC::CTR) in SubsumesPredicate()
1210 if (Pred1[1].getReg() != Pred2[1].getReg()) in SubsumesPredicate()
1213 PPC::Predicate P1 = (PPC::Predicate) Pred1[0].getImm(); in SubsumesPredicate()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h142 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DHexagonInstrInfo.cpp1054 SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h86 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DARMBaseInstrInfo.cpp480 SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
482 if (Pred1.size() > 2 || Pred2.size() > 2) in SubsumesPredicate()
485 ARMCC::CondCodes CC1 = (ARMCC::CondCodes)Pred1[0].getImm(); in SubsumesPredicate()
/external/llvm/include/llvm/Target/
DTargetInstrInfo.h714 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument