| /external/llvm/utils/TableGen/ |
| D | AsmWriterInst.cpp | 97 CGI.TheDef->getName() + "'!"); in AsmWriterInst()
136 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
143 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
151 PrintFatalError("Bad operand modifier name in '"+ CGI.TheDef->getName() + "'"); in AsmWriterInst()
156 + CGI.TheDef->getName() + "'"); in AsmWriterInst()
160 PrintFatalError("Stray '$' in '" + CGI.TheDef->getName() + in AsmWriterInst()
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| D | InstrInfoEmitter.cpp | 209 if (!Inst->TheDef->getValueAsBit("UseNamedOperandTable")) in initOperandMapData()
221 OperandMap[OpList].push_back(Namespace + "::" + Inst->TheDef->getName()); in initOperandMapData()
362 Record *Inst = II->TheDef; in run()
390 InstrNames.add(Inst->TheDef->getName()); in run()
408 OS << InstrNames.get(Inst->TheDef->getName()) << "U, "; in run()
476 << Inst.TheDef->getValueAsInt("Size") << ",\t0"; in emitRecord()
509 BitsInit *TSF = Inst.TheDef->getValueAsBitsInit("TSFlags"); in emitRecord()
517 PrintFatalError("Invalid TSFlags bit in " + Inst.TheDef->getName()); in emitRecord()
524 std::vector<Record*> UseList = Inst.TheDef->getValueAsListOfDefs("Uses"); in emitRecord()
530 std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs"); in emitRecord()
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| D | AsmMatcherEmitter.cpp | 396 Record *const TheDef; member
437 : AsmVariantID(0), TheDef(CGI.TheDef), DefRec(&CGI), in MatchableInfo()
442 : AsmVariantID(0), TheDef(Alias->TheDef), DefRec(Alias), in MatchableInfo()
565 Record *TheDef; member
570 SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {} in SubtargetFeatureInfo()
574 return "Feature_" + TheDef->getName(); in getEnumName()
579 TheDef->dump(); in dump()
687 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n"; in dump()
722 parseTwoOperandConstraint(Constraint, TheDef->getLoc()); in formTwoOperandAlias()
728 PrintFatalError(TheDef->getLoc(), in formTwoOperandAlias()
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| D | CodeGenSchedule.cpp | 80 if (R.match((*I)->TheDef->getName())) in apply()
81 Elts.insert((*I)->TheDef); in apply()
219 Record *SchedDef = (*I)->TheDef; in collectSchedRW()
298 findRWs(WI->TheDef->getValueAsListOfDefs("Writes"), WI->Sequence, in collectSchedRW()
351 if (I->TheDef == Def) in getSchedRWIdx()
359 Record *ReadDef = SchedReads[i].TheDef; in hasReadOfWrite()
414 SchedRW.TheDef ? SchedRW.TheDef->getValueAsInt("Repeat") : 1; in expandRWSequence()
440 PrintFatalError(AliasRW.TheDef->getLoc(), "Multiple aliases " in expandRWSeqForProc()
443 AliasDef = AliasRW.TheDef; in expandRWSeqForProc()
455 SchedWrite.TheDef ? SchedWrite.TheDef->getValueAsInt("Repeat") : 1; in expandRWSeqForProc()
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| D | CodeGenSchedule.h | 49 Record *TheDef; member
59 : Index(0), TheDef(nullptr), IsRead(false), IsAlias(false), in CodeGenSchedRW()
62 : Index(Idx), TheDef(Def), IsAlias(false), IsVariadic(false) { in CodeGenSchedRW()
77 : Index(Idx), Name(Name), TheDef(nullptr), IsRead(Read), IsAlias(false), in CodeGenSchedRW()
83 assert((!HasVariants || TheDef) && "Variant write needs record def"); in isValid()
88 return TheDef || !Sequence.empty(); in isValid()
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| D | AsmWriterEmitter.cpp | 111 << FirstInst.CGI->TheDef->getName() << ":\n"; in EmitInstructions()
114 << SimilarInsts[i].CGI->TheDef->getName() << ":\n"; in EmitInstructions()
125 FirstInst.CGI->TheDef->getName(), in EmitInstructions()
131 AWI.CGI->TheDef->getName(), in EmitInstructions()
175 InstrsForCase[idx] += Inst->CGI->TheDef->getName(); in FindUniqueOperandCommands()
182 InstrsForCase.push_back(Inst->CGI->TheDef->getName()); in FindUniqueOperandCommands()
405 << NumberedInstructions->at(i)->TheDef->getName() << "\n"; in EmitPrintInstruction()
419 << NumberedInstructions->at(i)->TheDef->getName() << "\n"; in EmitPrintInstruction()
535 AsmName = Reg.TheDef->getValueAsString("AsmName"); in emitRegisterNameString()
541 Reg.TheDef->getValueAsListOfDefs("RegAltNameIndices"); in emitRegisterNameString()
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| D | SubtargetEmitter.cpp | 676 if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes")) in FindWriteResources()
677 return SchedWrite.TheDef; in FindWriteResources()
684 if (AliasRW.TheDef->getValueInit("SchedModel")->isComplete()) { in FindWriteResources()
685 Record *ModelDef = AliasRW.TheDef->getValueAsDef("SchedModel"); in FindWriteResources()
690 PrintFatalError(AliasRW.TheDef->getLoc(), "Multiple aliases " in FindWriteResources()
693 AliasDef = AliasRW.TheDef; in FindWriteResources()
705 || SchedWrite.TheDef == (*WRI)->getValueAsDef("WriteType")) { in FindWriteResources()
719 + SchedWrite.TheDef->getName()); in FindWriteResources()
729 if (SchedRead.TheDef->isSubClassOf("SchedReadAdvance")) in FindReadAdvance()
730 return SchedRead.TheDef; in FindReadAdvance()
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| D | CodeGenInstruction.cpp | 28 CGIOperandList::CGIOperandList(Record *R) : TheDef(R) { in CGIOperandList()
136 PrintFatalError("'" + TheDef->getName() + in getOperandNamed()
156 PrintFatalError(TheDef->getName() + ": Illegal operand name: '" + Op + "'"); in ParseOperandName()
166 PrintFatalError(TheDef->getName() + ": illegal empty suboperand name in '" +Op +"'"); in ParseOperandName()
176 PrintFatalError(TheDef->getName() + ": Illegal to refer to" in ParseOperandName()
186 PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'"); in ParseOperandName()
194 PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'"); in ParseOperandName()
293 : TheDef(R), Operands(R), InferredFrom(nullptr) { in CodeGenInstruction()
558 : TheDef(R) { in CodeGenInstAlias()
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| D | CodeGenRegisters.cpp | 34 : TheDef(R), EnumValue(Enum), LaneMask(0), AllSuperRegsCovered(true) { in CodeGenSubRegIndex()
44 : TheDef(nullptr), Name(N), Namespace(Nspace), Size(-1), Offset(-1), in CodeGenSubRegIndex()
57 if (!TheDef) in updateComponents()
60 std::vector<Record*> Comps = TheDef->getValueAsListOfDefs("ComposedOf"); in updateComponents()
63 PrintFatalError(TheDef->getLoc(), in updateComponents()
69 PrintFatalError(TheDef->getLoc(), "Ambiguous ComposedOf entries"); in updateComponents()
73 TheDef->getValueAsListOfDefs("CoveringSubRegIndices"); in updateComponents()
76 PrintFatalError(TheDef->getLoc(), in updateComponents()
107 : TheDef(R), in CodeGenRegister()
118 std::vector<Record*> SRIs = TheDef->getValueAsListOfDefs("SubRegIndices"); in buildObjectGraph()
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| D | CodeGenInstruction.h | 128 Record *TheDef; // The actual record containing this OperandList. variable
208 Record *TheDef; // The actual record defining this instruction.
288 Record *TheDef; // The actual record defining this InstAlias.
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| D | CodeGenRegisters.h | 37 Record *const TheDef; variable
112 Record *TheDef; member
251 Record *TheDef; variable
286 Record *getDef() const { return TheDef; } in getDef()
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| D | RegisterInfoEmitter.cpp | 76 std::string Namespace = Registers[0]->TheDef->getValueAsString("Namespace"); in runEnums()
324 Record *Reg = Regs[i]->TheDef; in EmitRegMappingTables()
342 std::string Namespace = Regs[0]->TheDef->getValueAsString("Namespace"); in EmitRegMappingTables()
391 Record *Reg = Regs[i]->TheDef; in EmitRegMappingTables()
447 Record *Reg = Regs[i]->TheDef; in EmitRegMapping()
455 std::string Namespace = Regs[0]->TheDef->getValueAsString("Namespace"); in EmitRegMapping()
839 OS << " { " << getQualifiedName(Roots.front()->TheDef); in runMCDesc()
841 OS << ", " << getQualifiedName(Roots[r]->TheDef); in runMCDesc()
915 Record *Reg = Regs[i]->TheDef; in runMCDesc()
1220 << int(AllocatableRegs.count(Reg.TheDef)) << " },\n"; in runTargetDesc()
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| D | FixedLenDecoderEmitter.cpp | 374 BitsInit &Bits = getBitsField(*AllInstructions[Opcode]->TheDef, "Inst"); in insnWithID()
382 AllInstructions[Opcode]->TheDef->getValueAsBitsInit("SoftFail"); in insnWithID()
394 return AllInstructions[Opcode]->TheDef->getName(); in nameWithID()
830 << NumberedInstructions->at(Opc)->TheDef->getName() << "\n"; in emitTable()
999 getBitsField(*AllInstructions[Opcodes[i]]->TheDef, "Inst")); in SingletonExists()
1150 AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates"); in emitPredicateMatch()
1178 AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates"); in doesOpcodeNeedPredicate()
1245 AllInstructions[Opc]->TheDef->getValueAsBitsInit("SoftFail"); in emitSoftFailTableEntry()
1247 BitsInit *InstBits = AllInstructions[Opc]->TheDef->getValueAsBitsInit("Inst"); in emitSoftFailTableEntry()
1268 StringRef Name = AllInstructions[Opc]->TheDef->getName(); in emitSoftFailTableEntry()
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| D | CodeGenIntrinsics.h | 27 Record *TheDef; // The actual record defining this intrinsic. member
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| D | PseudoLoweringEmitter.cpp | 212 << Source.TheDef->getName() << ": {\n" in emitLoweringEmitter()
216 << Dest.TheDef->getName() << ");\n"; in emitLoweringEmitter()
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| D | CodeGenDAGPatterns.h | 751 if (Intrinsics[i].TheDef == R) return Intrinsics[i]; in getIntrinsic()
753 if (TgtIntrinsics[i].TheDef == R) return TgtIntrinsics[i]; in getIntrinsic()
767 if (Intrinsics[i].TheDef == R) return i; in getIntrinsicID()
769 if (TgtIntrinsics[i].TheDef == R) return i + Intrinsics.size(); in getIntrinsicID()
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| D | CodeGenTarget.cpp | 327 return Rec1->TheDef->getName() < Rec2->TheDef->getName(); in ComputeInstrsByEnum()
445 TheDef = R; in CodeGenIntrinsic()
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| D | CodeEmitterGen.cpp | 260 Record *R = CGI->TheDef; in run()
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| D | IntrinsicEmitter.cpp | 754 PrintFatalError("Intrinsic '" + Ints[i].TheDef->getName() + in EmitIntrinsicToGCCBuiltinMap()
810 PrintFatalError("Intrinsic '" + Intrinsic.TheDef->getName() + "': " in EmitIntrinsicToMSBuiltinMap()
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| D | CodeGenDAGPatterns.cpp | 2767 assert(!DAGInsts.count(CGI.TheDef) && "Instruction already parsed!"); in parseInstructionPattern()
2770 TreePattern *I = new TreePattern(CGI.TheDef, Pat, true, *this); in parseInstructionPattern()
3092 const TreePattern *Pattern = getInstruction(InstInfo.TheDef).getPattern(); in InferInstructionFlags()
3100 Errors += InferFromPattern(InstInfo, PatInfo, InstInfo.TheDef); in InferInstructionFlags()
3150 PrintError(InstInfo.TheDef->getLoc(), in InferInstructionFlags()
3153 PrintError(InstInfo.TheDef->getLoc(), in InferInstructionFlags()
3156 PrintError(InstInfo.TheDef->getLoc(), in InferInstructionFlags()
3219 InstInfo.InferredFrom != InstInfo.TheDef && in VerifyInstructionFlags()
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| D | DAGISelMatcherEmitter.cpp | 460 OS << "TARGET_VAL(" << getQualifiedName(Reg->TheDef) << "),\n"; in EmitMatcher()
465 OS << getQualifiedName(Reg->TheDef) << ",\n"; in EmitMatcher()
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| D | CodeGenMapTable.cpp | 375 Record *CurInstr = NumberedInstructions[i]->TheDef; in emitBinSearchTable()
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| D | X86RecognizableInstr.cpp | 179 Rec = insn.TheDef; in RecognizableInstr()
252 if (insn.TheDef->getValueAsBit("isAsmParserOnly")) in processInstr()
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| D | DAGISelMatcherGen.cpp | 882 AddMatcher(new EmitNodeMatcher(II.Namespace+"::"+II.TheDef->getName(), in EmitResultInstructionAsOperand()
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