| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 515 { ISD::UDIV, MVT::v1i64, 1 * FunctionCallDivCost}, in getArithmeticInstrCost()
519 { ISD::UDIV, MVT::v2i32, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
523 { ISD::UDIV, MVT::v4i16, ReciprocalDivCost}, in getArithmeticInstrCost()
527 { ISD::UDIV, MVT::v8i8, ReciprocalDivCost}, in getArithmeticInstrCost()
532 { ISD::UDIV, MVT::v2i64, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
536 { ISD::UDIV, MVT::v4i32, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
540 { ISD::UDIV, MVT::v8i16, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
544 { ISD::UDIV, MVT::v16i8, 16 * FunctionCallDivCost}, in getArithmeticInstrCost()
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| /external/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 193 { ISD::UDIV, MVT::v16i16, 6 }, // vpmulhuw sequence in getArithmeticInstrCost()
195 { ISD::UDIV, MVT::v8i32, 15 }, // vpmuludq sequence in getArithmeticInstrCost()
234 { ISD::UDIV, MVT::v32i8, 32*20 }, in getArithmeticInstrCost()
235 { ISD::UDIV, MVT::v16i16, 16*20 }, in getArithmeticInstrCost()
236 { ISD::UDIV, MVT::v8i32, 8*20 }, in getArithmeticInstrCost()
237 { ISD::UDIV, MVT::v4i64, 4*20 }, in getArithmeticInstrCost()
274 { ISD::UDIV, MVT::v8i16, 6 }, // pmulhuw sequence in getArithmeticInstrCost()
276 { ISD::UDIV, MVT::v4i32, 15 }, // pmuludq sequence in getArithmeticInstrCost()
340 { ISD::UDIV, MVT::v16i8, 16*20 }, in getArithmeticInstrCost()
341 { ISD::UDIV, MVT::v8i16, 8*20 }, in getArithmeticInstrCost()
[all …]
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 207 setOperationAction(ISD::UDIV, MVT::v2i8, Expand); in InitAMDILLowering()
208 setOperationAction(ISD::UDIV, MVT::v4i8, Expand); in InitAMDILLowering()
209 setOperationAction(ISD::UDIV, MVT::v2i16, Expand); in InitAMDILLowering()
210 setOperationAction(ISD::UDIV, MVT::v4i16, Expand); in InitAMDILLowering()
623 r0 = DAG.getNode(ISD::UDIV, DL, OVT, r0, r1); in LowerSDIV32()
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| D | AMDGPUISelLowering.cpp | 39 setOperationAction(ISD::UDIV, MVT::i32, Expand); in AMDGPUTargetLowering()
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 207 setOperationAction(ISD::UDIV, MVT::v2i8, Expand); in InitAMDILLowering()
208 setOperationAction(ISD::UDIV, MVT::v4i8, Expand); in InitAMDILLowering()
209 setOperationAction(ISD::UDIV, MVT::v2i16, Expand); in InitAMDILLowering()
210 setOperationAction(ISD::UDIV, MVT::v4i16, Expand); in InitAMDILLowering()
623 r0 = DAG.getNode(ISD::UDIV, DL, OVT, r0, r1); in LowerSDIV32()
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| D | AMDGPUISelLowering.cpp | 39 setOperationAction(ISD::UDIV, MVT::i32, Expand); in AMDGPUTargetLowering()
|
| /external/openssl/crypto/bn/asm/ |
| D | ppc.pl | 116 $UDIV= "divwu"; # unsigned divide
140 $UDIV= "divdu"; # unsigned divide
1670 $UDIV r8,r3,r9 #q = h/dh
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 181 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
| D | tgsi_opcode_tmp.h | 155 OP12(UDIV)
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_opcode_tmp.h | 155 OP12(UDIV)
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 155 case ISD::UDIV: { in Select()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsCodeEmitter.cpp | 405 expandACCInstr(MI, MBB, Mips::UDIV); in expandPseudos()
|
| D | MipsSEISelLowering.cpp | 169 setOperationAction(ISD::UDIV, MVT::i32, Legal); in MipsSETargetLowering()
214 setOperationAction(ISD::UDIV, MVT::i64, Legal); in MipsSETargetLowering()
269 setOperationAction(ISD::UDIV, Ty, Legal); in addMSAIntType()
1773 return DAG.getNode(ISD::UDIV, DL, Op->getValueType(0), Op->getOperand(1), in lowerINTRINSIC_WO_CHAIN()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.h | 706 void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); } in visitUDiv()
|
| D | SelectionDAGDumper.cpp | 167 case ISD::UDIV: return "udiv"; in getOperationName()
|
| D | FastISel.cpp | 1113 return SelectBinaryOp(I, ISD::UDIV); in SelectOperator()
1291 } else if (Opcode == ISD::UDIV && isPowerOf2_64(Imm)) { in FastEmit_ri_()
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| D | LegalizeVectorOps.cpp | 242 case ISD::UDIV: in LegalizeOp()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 151 setOperationAction(ISD::UDIV, MVT::i8, Expand); in MSP430TargetLowering()
157 setOperationAction(ISD::UDIV, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 859 case ISD::UDIV: in canOpTrap()
1348 case UDiv: return ISD::UDIV; in InstructionOpcodeToISD()
|
| /external/pcre/dist/sljit/ |
| D | sljitNativeSPARC_common.c | 173 #define UDIV (OPC1(0x2) | OPC3(0x0e)) macro
805 …FAIL_IF(push_inst(compiler, (op == SLJIT_UDIV ? UDIV : SDIV) | D(SLJIT_R0) | S1(SLJIT_R0) | S2(SLJ… in sljit_emit_op0()
|
| /external/llvm/lib/Target/R600/ |
| D | R600ISelLowering.cpp | 160 setOperationAction(ISD::UDIV, MVT::i64, Custom); in R600TargetLowering()
844 case ISD::UDIV: { in ReplaceNodeResults()
906 SDValue DIV_Part = DAG.getNode(ISD::UDIV, DL, HalfVT, LHS_Hi, RHS_Lo); in ReplaceNodeResults()
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| D | AMDGPUISelLowering.cpp | 278 setOperationAction(ISD::UDIV, MVT::i32, Expand); in AMDGPUTargetLowering()
305 setOperationAction(ISD::UDIV, VT, Expand); in AMDGPUTargetLowering()
1412 r0 = DAG.getNode(ISD::UDIV, DL, OVT, r0, r1); in LowerSDIV32()
|
| /external/vixl/src/a64/ |
| D | constants-a64.h | 837 UDIV = UDIV_w, enumerator
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1096 setOperationAction(ISD::UDIV, MVT::i32, Expand); in HexagonTargetLowering()
1099 setOperationAction(ISD::UDIV, MVT::i64, Expand); in HexagonTargetLowering()
|
| /external/chromium_org/v8/src/arm64/ |
| D | constants-arm64.h | 955 UDIV = UDIV_w, enumerator
|