| /external/llvm/lib/CodeGen/ |
| D | LiveRangeEdit.cpp | 168 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
180 if (UseMI && UseMI != MI) in foldAsLoad()
185 UseMI = MI; in foldAsLoad()
188 if (!DefMI || !UseMI) in foldAsLoad()
195 LIS.getInstructionIndex(UseMI))) in foldAsLoad()
205 << " into single use: " << *UseMI); in foldAsLoad()
208 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second) in foldAsLoad()
211 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI); in foldAsLoad()
215 LIS.ReplaceMachineInstrInMaps(UseMI, FoldMI); in foldAsLoad()
216 UseMI->eraseFromParent(); in foldAsLoad()
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| D | TargetSchedule.cpp | 157 const MachineInstr *UseMI, unsigned UseOperIdx) const { in computeOperandLatency() argument
164 if (UseMI) { in computeOperandLatency()
166 UseMI, UseOperIdx); in computeOperandLatency()
196 if (!UseMI) in computeOperandLatency()
200 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI); in computeOperandLatency()
203 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency()
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| D | RegisterScavenging.cpp | 290 MachineBasicBlock::iterator &UseMI) { in findSurvivorReg() argument
348 UseMI = RestorePointMI; in findSurvivorReg()
387 MachineBasicBlock::iterator UseMI; in scavengeRegister() local
388 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI); in scavengeRegister()
413 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { in scavengeRegister()
425 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, Scavenged[SI].FrameIndex, in scavengeRegister()
427 II = std::prev(UseMI); in scavengeRegister()
433 Scavenged[SI].Restore = std::prev(UseMI); in scavengeRegister()
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| D | MachineTraceMetrics.cpp | 638 static bool getDataDeps(const MachineInstr *UseMI, in getDataDeps() argument
642 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) { in getDataDeps()
662 static void getPHIDeps(const MachineInstr *UseMI, in getPHIDeps() argument
669 assert(UseMI->isPHI() && UseMI->getNumOperands() % 2 && "Bad PHI"); in getPHIDeps()
670 for (unsigned i = 1; i != UseMI->getNumOperands(); i += 2) { in getPHIDeps()
671 if (UseMI->getOperand(i + 1).getMBB() == Pred) { in getPHIDeps()
672 unsigned Reg = UseMI->getOperand(i).getReg(); in getPHIDeps()
698 static void updatePhysDepsDownwards(const MachineInstr *UseMI, in updatePhysDepsDownwards() argument
705 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) { in updatePhysDepsDownwards()
740 for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg(), TRI); in updatePhysDepsDownwards()
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| D | PeepholeOptimizer.cpp | 306 MachineInstr *UseMI = UseMO.getParent(); in INITIALIZE_PASS_DEPENDENCY() local
307 if (UseMI == MI) in INITIALIZE_PASS_DEPENDENCY()
310 if (UseMI->isPHI()) { in INITIALIZE_PASS_DEPENDENCY()
336 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) in INITIALIZE_PASS_DEPENDENCY()
339 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
342 if (!LocalMIs.count(UseMI)) in INITIALIZE_PASS_DEPENDENCY()
380 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY() local
381 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
392 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(), in INITIALIZE_PASS_DEPENDENCY()
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| D | OptimizePHIs.cpp | 146 for (MachineInstr &UseMI : MRI->use_instructions(DstReg)) { in IsDeadPHICycle()
147 if (!UseMI.isPHI() || !IsDeadPHICycle(&UseMI, PHIsInCycle)) in IsDeadPHICycle()
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| D | RegisterCoalescer.cpp | 625 MachineInstr *UseMI = MO.getParent(); in removeCopyByCommutingDef() local
626 unsigned OpNo = &MO - &UseMI->getOperand(0); in removeCopyByCommutingDef()
627 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI); in removeCopyByCommutingDef()
632 if (UseMI->isRegTiedToDefOperand(OpNo)) in removeCopyByCommutingDef()
671 MachineInstr *UseMI = UseMO.getParent(); in removeCopyByCommutingDef() local
673 if (UseMI->isDebugValue()) { in removeCopyByCommutingDef()
679 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true); in removeCopyByCommutingDef()
689 if (UseMI == CopyMI) in removeCopyByCommutingDef()
691 if (!UseMI->isCopy()) in removeCopyByCommutingDef()
693 if (UseMI->getOperand(0).getReg() != IntB.reg || in removeCopyByCommutingDef()
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| D | MachineLICM.cpp | 984 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in HasLoopPHIUse()
986 if (UseMI.isPHI()) { in HasLoopPHIUse()
989 if (CurLoop->contains(&UseMI)) in HasLoopPHIUse()
994 if (isExitBlock(UseMI.getParent())) in HasLoopPHIUse()
999 if (UseMI.isCopy() && CurLoop->contains(&UseMI)) in HasLoopPHIUse()
1000 Work.push_back(&UseMI); in HasLoopPHIUse()
1015 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(Reg)) { in HasHighOperandLatency()
1016 if (UseMI.isCopyLike()) in HasHighOperandLatency()
1018 if (!CurLoop->contains(UseMI.getParent())) in HasHighOperandLatency()
1020 for (unsigned i = 0, e = UseMI.getNumOperands(); i != e; ++i) { in HasHighOperandLatency()
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| D | MachineSSAUpdater.cpp | 223 MachineInstr *UseMI = U.getParent(); in RewriteUse() local
225 if (UseMI->isPHI()) { in RewriteUse()
226 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U); in RewriteUse()
229 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
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| D | TailDuplication.cpp | 270 MachineInstr *UseMI = UseMO.getParent(); in TailDuplicateAndUpdate() local
272 if (UseMI->isDebugValue()) { in TailDuplicateAndUpdate()
277 UseMI->eraseFromParent(); in TailDuplicateAndUpdate()
280 if (UseMI->getParent() == DefBB && !UseMI->isPHI()) in TailDuplicateAndUpdate()
345 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in isDefLiveOut()
346 if (UseMI.isDebugValue()) in isDefLiveOut()
348 if (UseMI.getParent() != BB) in isDefLiveOut()
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| D | MachineRegisterInfo.cpp | 428 MachineInstr *UseMI = &*I; in markUsesInDebugValueAsUndef() local
429 if (UseMI->isDebugValue()) in markUsesInDebugValueAsUndef()
430 UseMI->getOperand(0).setReg(0U); in markUsesInDebugValueAsUndef()
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| D | TargetInstrInfo.cpp | 792 const MachineInstr *UseMI, unsigned UseIdx) const { in getOperandLatency() argument
794 unsigned UseClass = UseMI->getDesc().getSchedClass(); in getOperandLatency()
829 const MachineInstr *UseMI, unsigned UseIdx) const { in computeOperandLatency() argument
838 if (UseMI) in computeOperandLatency()
839 OperLatency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx); in computeOperandLatency()
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| D | TwoAddressInstructionPass.cpp | 459 MachineInstr &UseMI = *MRI->use_instr_nodbg_begin(Reg); in findOnlyInterestingUse() local
460 if (UseMI.getParent() != MBB) in findOnlyInterestingUse()
464 if (isCopyToReg(UseMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) { in findOnlyInterestingUse()
466 return &UseMI; in findOnlyInterestingUse()
469 if (isTwoAddrUse(UseMI, Reg, DstReg)) { in findOnlyInterestingUse()
471 return &UseMI; in findOnlyInterestingUse()
667 while (MachineInstr *UseMI = findOnlyInterestingUse(Reg, MBB, MRI, TII,IsCopy, in scanUses() local
669 if (IsCopy && !Processed.insert(UseMI)) in scanUses()
672 DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI); in scanUses()
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| /external/llvm/lib/Target/ARM/ |
| D | MLxExpansionPass.cpp | 124 MachineInstr *UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg() local
125 if (UseMI->getParent() != MBB) in getDefReg()
128 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()
129 Reg = UseMI->getOperand(0).getReg(); in getDefReg()
133 UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg()
134 if (UseMI->getParent() != MBB) in getDefReg()
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| D | Thumb1RegisterInfo.h | 54 MachineBasicBlock::iterator &UseMI,
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| D | Thumb1RegisterInfo.cpp | 507 MachineBasicBlock::iterator &UseMI, in saveScavengerRegister() argument
525 for (MachineBasicBlock::iterator II = I; !done && II != UseMI ; ++II) { in saveScavengerRegister()
532 UseMI = II; in saveScavengerRegister()
540 UseMI = II; in saveScavengerRegister()
547 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)). in saveScavengerRegister()
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| D | ARMBaseInstrInfo.cpp | 2490 bool ARMBaseInstrInfo::FoldImmediate(MachineInstr *UseMI, in FoldImmediate() argument
2514 const MCInstrDesc &UseMCID = UseMI->getDesc(); in FoldImmediate()
2517 if (UseMI->getOperand(NumOps-1).getReg() == ARM::CPSR) in FoldImmediate()
2523 unsigned UseOpc = UseMI->getOpcode(); in FoldImmediate()
2538 Commute = UseMI->getOperand(2).getReg() != Reg; in FoldImmediate()
2590 unsigned Reg1 = UseMI->getOperand(OpIdx).getReg(); in FoldImmediate()
2591 bool isKill = UseMI->getOperand(OpIdx).isKill(); in FoldImmediate()
2593 AddDefaultCC(AddDefaultPred(BuildMI(*UseMI->getParent(), in FoldImmediate()
2594 UseMI, UseMI->getDebugLoc(), in FoldImmediate()
2598 UseMI->setDesc(get(NewUseOpc)); in FoldImmediate()
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| D | ARMBaseInstrInfo.h | 209 bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
217 const MachineInstr *UseMI,
279 const MachineInstr *UseMI,
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 110 const MachineInstr *UseMI, in getOperandLatency() argument
113 UseMI, UseIdx); in getOperandLatency()
130 if (UseMI->isBranch() && IsRegCR) { in getOperandLatency()
992 bool PPCInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate() argument
1008 const MCInstrDesc &UseMCID = UseMI->getDesc(); in FoldImmediate()
1015 for (UseIdx = 0; UseIdx < UseMI->getNumOperands(); ++UseIdx) in FoldImmediate()
1016 if (UseMI->getOperand(UseIdx).isReg() && in FoldImmediate()
1017 UseMI->getOperand(UseIdx).getReg() == Reg) in FoldImmediate()
1020 assert(UseIdx < UseMI->getNumOperands() && "Cannot find Reg in UseMI"); in FoldImmediate()
1052 UseMI->getOperand(UseIdx).setReg(ZeroReg); in FoldImmediate()
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| D | PPCInstrInfo.h | 100 const MachineInstr *UseMI,
169 bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16RegisterInfo.cpp | 64 MachineBasicBlock::iterator &UseMI, in saveScavengerRegister() argument
70 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); in saveScavengerRegister()
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| D | Mips16RegisterInfo.h | 34 MachineBasicBlock::iterator &UseMI,
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 817 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate() argument
851 const MachineInstr *UseMI,
858 const MachineInstr *UseMI, unsigned UseIdx)
893 const MachineInstr *UseMI, unsigned UseIdx) const { in hasHighOperandLatency() argument
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| /external/llvm/include/llvm/CodeGen/ |
| D | TargetSchedule.h | 154 const MachineInstr *UseMI, unsigned UseOperIdx)
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| D | RegisterScavenging.h | 202 MachineBasicBlock::iterator &UseMI);
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