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Searched refs:getLocVT (Results 1 – 17 of 17) sorted by relevance

/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp214 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
276 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
279 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
282 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
308 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_64()
377 assert(VA.getLocVT() == MVT::f64); in LowerFormalArguments_32()
407 if (VA.getLocVT() == MVT::f32) in LowerFormalArguments_32()
409 else if (VA.getLocVT() != MVT::i32) { in LowerFormalArguments_32()
411 DAG.getValueType(VA.getLocVT())); in LowerFormalArguments_32()
412 Arg = DAG.getNode(ISD::TRUNCATE, dl, VA.getLocVT(), Arg); in LowerFormalArguments_32()
[all …]
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp454 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
497 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
500 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
509 InVal = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
556 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
612 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
615 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
618 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
/external/llvm/lib/Target/X86/
DX86FastISel.cpp2857 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in DoSelectCall()
2859 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), in DoSelectCall()
2862 ArgVT = VA.getLocVT(); in DoSelectCall()
2866 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in DoSelectCall()
2868 bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), in DoSelectCall()
2871 ArgVT = VA.getLocVT(); in DoSelectCall()
2875 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in DoSelectCall()
2877 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), in DoSelectCall()
2880 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), in DoSelectCall()
2883 Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), in DoSelectCall()
[all …]
DX86ISelLowering.cpp1894 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
1896 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
1898 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
1900 ValToCopy = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
1950 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
2204 ValVT = VA.getLocVT(); in LowerMemArgument()
2275 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
2687 EVT RegVT = VA.getLocVT(); in LowerCall()
2827 uint32_t OpSize = (VA.getLocVT().getSizeInBits()+7)/8; in LowerCall()
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp1156 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1159 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1162 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1318 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
1338 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
1341 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
1352 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
1497 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerReturn()
1525 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp342 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
485 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
488 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
491 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
872 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
898 ObjSize = VA.getLocVT().getStoreSizeInBits() >> 3; in LowerFormalArguments()
915 InVals.push_back(DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerFormalArguments()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp631 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
634 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
654 return DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
656 return DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
658 return DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
690 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
731 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerFormalArguments()
867 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerCall()
953 VA.getLocVT(), Glue); in LowerCall()
1001 RetOps.push_back(DAG.getRegister(Reg, VA.getLocVT())); in LowerReturn()
/external/llvm/lib/Target/ARM/
DARMCallingConv.h183 assert(PendingHAMembers[0].getLocVT() == LocVT); in CC_ARM_AAPCS_Custom_HA()
DARMFastISel.cpp1905 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1954 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1963 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1970 unsigned BC = FastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg, in ProcessCallArgs()
1974 ArgVT = VA.getLocVT(); in ProcessCallArgs()
1987 assert(VA.getLocVT() == MVT::f64 && in ProcessCallArgs()
DARMISelLowering.cpp1272 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i32 && in LowerCallResult()
1294 if (VA.getLocVT() == MVT::v2f64) { in LowerCallResult()
1314 Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), in LowerCallResult()
1459 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1462 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1465 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1468 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
1474 if (VA.getLocVT() == MVT::v2f64) { in LowerCall()
1499 assert(VA.getLocVT() == MVT::i32 && in LowerCall()
2003 EVT RegVT = VA.getLocVT(); in IsEligibleForTailCallOptimization()
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/external/llvm/include/llvm/CodeGen/
DCallingConvLower.h142 MVT getLocVT() const { return LocVT; } in getLocVT() function
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp1709 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1756 unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8; in LowerFormalArguments()
1776 MemVT = VA.getLocVT(); in LowerFormalArguments()
1789 ArgValue = DAG.getExtLoad(ExtType, DL, VA.getLocVT(), Chain, FIN, in LowerFormalArguments()
1934 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i64 && in LowerCallResult()
1941 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag); in LowerCallResult()
2258 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
2261 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
2269 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
2272 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerCall()
[all …]
DAArch64FastISel.cpp1223 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1233 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp2459 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); in LowerCall()
2624 RVLocs[i].getLocVT(), InFlag); in LowerCallResult()
2628 if (RVLocs[i].getValVT() != RVLocs[i].getLocVT()) in LowerCallResult()
2696 MVT RegVT = VA.getLocVT(); in LowerFormalArguments()
2832 if (RVLocs[i].getValVT() != RVLocs[i].getLocVT()) in LowerReturn()
2833 Val = DAG.getNode(ISD::BITCAST, DL, RVLocs[i].getLocVT(), Val); in LowerReturn()
2839 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp1261 MVT DestVT = VA.getLocVT(); in processCallArgs()
1273 MVT DestVT = VA.getLocVT(); in processCallArgs()
1571 MVT DestVT = VA.getLocVT(); in SelectRet()
DPPCISelLowering.cpp2301 unsigned ArgSize = VA.getLocVT().getStoreSize(); in LowerFormalArguments_32SVR4()
3535 VA.getLocReg(), VA.getLocVT(), InFlag); in LowerCallResult()
3546 Val = DAG.getNode(ISD::AssertZext, dl, VA.getLocVT(), Val, in LowerCallResult()
3551 Val = DAG.getNode(ISD::AssertSext, dl, VA.getLocVT(), Val, in LowerCallResult()
3865 seenFloatArg |= VA.getLocVT().isFloatingPoint(); in LowerCall_32SVR4()
4785 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerReturn()
4788 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerReturn()
4791 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerReturn()
4797 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/external/llvm/lib/Target/R600/
DSIISelLowering.cpp398 EVT VT = VA.getLocVT(); in LowerFormalArguments()