| /external/llvm/lib/CodeGen/ |
| D | ProcessImplicitDefs.cpp | 71 if (MO->isReg() && MO->isUse() && MO->readsReg()) in canTurnIntoImplicitDef()
111 if (MO->isUse()) in processImplicitDef()
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| D | Spiller.cpp | 112 hasUse |= mi->getOperand(i).isUse(); in trivialSpillEverywhere()
125 if (mop.isUse() && !mi->isRegTiedToDefOperand(mopIdx)) { in trivialSpillEverywhere()
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| D | ExpandPostRAPseudos.cpp | 73 if (!MO.isReg() || !MO.isImplicit() || MO.isUse()) in TransferImplicitDefs()
83 (MI->getOperand(2).isReg() && MI->getOperand(2).isUse()) && in LowerSubregToReg()
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| D | MachineInstr.cpp | 305 if (isUndef() && isUse()) { in print()
719 if (NewMO->isUse()) { in addOperand()
984 if (getOperand(OpIdx).isUse() && isRegTiedToDefOperand(OpIdx, &DefIdx)) in getRegClassConstraint()
1069 if (!MO.isReg() || !MO.isUse()) in findRegisterUseOperandIdx()
1101 if (MO.isUse()) in readsWritesVirtualRegister()
1181 assert(UseMO.isUse() && "UseIdx must be a use operand"); in tieOperands()
1213 if (MO.isUse()) in findTiedOperandIdx()
1218 if (UseMO.isReg() && UseMO.isUse() && UseMO.TiedTo == OpIdx + 1) in findTiedOperandIdx()
1262 if (MO.isReg() && MO.isUse()) in clearKillInfo()
1427 if (!MO.isReg() || MO.isUse()) in allDefsAreDead()
[all …]
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| D | TwoAddressInstructionPass.cpp | 201 if (MO.isUse() && MOReg != SavedReg) in sink3AddrInstruction()
326 if (MO.isUse() && DI->second < LastUse) in noUseAfterLastDef()
437 if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg) in isTwoAddrUse()
988 if (MO.isUse()) { in rescheduleKillAboveMI()
1029 if (MO.isUse()) { in rescheduleKillAboveMI()
1234 if (MO.isUse()) { in tryInstructionTransform()
1314 assert(SrcReg && SrcMO.isUse() && "two address instruction invalid"); in collectTiedOperands()
1427 assert(MO.isReg() && MO.getReg() == RegB && MO.isUse() && in processTiedPairs()
1455 MO.isUse()) { in processTiedPairs()
1492 if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) { in processTiedPairs()
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| D | RegisterScavenging.cpp | 137 if (MO.isUse()) { in determineKillsAndDefs()
208 if (MO.isUse()) { in forward()
372 if (MO.isReg() && MO.getReg() != 0 && !(MO.isUse() && MO.isUndef()) && in scavengeRegister()
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| D | RegAllocFast.cpp | 237 if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) { in addKillFlag()
603 if (LRI->LastUse != MI || LRI->LastUse->getOperand(LRI->LastOpNum).isUse()) in defineVirtReg()
635 if (MO.isUse()) in reloadVirtReg()
735 if (MO.isUse()) { in handleThroughOperands()
919 if (MO.isUse()) { in AllocateBasicBlock()
931 if (MO.isUse()) { in AllocateBasicBlock()
967 if (MO.isUse()) { in AllocateBasicBlock()
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| D | LivePhysRegs.cpp | 79 assert(O->isUse()); in stepForward()
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| D | MachineSink.cpp | 303 if (!MO.isReg() || !MO.isUse()) in isWorthBreakingCriticalEdge()
497 if (MO.isUse()) { in FindSuccToSinkTo()
509 if (MO.isUse()) continue; in FindSuccToSinkTo()
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| D | CriticalAntiDepBreaker.cpp | 232 if (MO.isUse() && Special) { in PrescanInstruction()
305 if (!MO.isUse()) continue; in ScanInstruction()
626 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) { in BreakAntiDependencies()
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| D | MachineCSE.cpp | 120 if (!MO.isReg() || !MO.isUse()) in INITIALIZE_PASS_DEPENDENCY()
189 if (MO.isUse()) in isPhysDefTriviallyDead()
395 if (MO.isReg() && MO.isUse() && in isProfitableToCSE()
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| D | LiveIntervalAnalysis.cpp | 636 LiveIntervals::getSpillWeight(bool isDef, bool isUse, in getSpillWeight() argument
641 return (isDef + isUse) * (Freq.getFrequency() * Scale); in getSpillWeight()
762 if (MO->isUse()) in updateAllRanges()
845 if (MO->isReg() && MO->isUse()) in handleMoveDown()
1177 } else if (MO.isUse()) { in repairIntervalsInRange()
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| D | DeadMachineInstructionElim.cpp | 167 if (MO.isReg() && MO.isUse()) { in runOnMachineFunction()
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| D | TargetInstrInfo.cpp | 520 assert(MI->getOperand(Ops[i]).isUse() && "Folding load into def!"); in foldMemoryOperand()
614 if (MO.isUse()) { in isReallyTriviallyReMaterializableGeneric()
635 if (MO.isUse()) in isReallyTriviallyReMaterializableGeneric()
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| D | BranchFolding.cpp | 161 if (!MO.isReg() || !MO.isUse()) in OptimizeImpDefsBlock()
1505 if (MO.isUse()) { in findHoistingInsertPosAndDeps()
1539 if (!MO.isReg() || MO.isUse()) in findHoistingInsertPosAndDeps()
1573 if (MO.isUse()) { in findHoistingInsertPosAndDeps()
1704 if (!MO.isReg() || !MO.isUse() || !MO.isKill()) in HoistCommonCodeInSuccs()
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| D | InlineSpiller.cpp | 863 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg) in reMaterializeFor()
917 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg) { in reMaterializeFor()
1123 if (MO->isUse()) in foldMemoryOperand()
1291 if (MO.isUse()) { in spillAroundUses()
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| /external/llvm/lib/Target/Sparc/ |
| D | DelaySlotFiller.cpp | 265 if (MO.isUse()) { in delayHasHazard()
290 assert(Reg.isUse() && "CALL first operand is not a use."); in insertCallDefsUses()
297 assert(RegOrImm.isUse() && "CALLrr second operand is not a use."); in insertCallDefsUses()
318 if (MO.isUse()) { in insertDefsUses()
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| /external/llvm/lib/Target/R600/ |
| D | SIInsertWaits.cpp | 180 if (I->isReg() && I->isUse()) in isOpRelevant()
238 if (Op.isUse()) in pushInstruction()
336 if (Op.isUse()) in handleOperands()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 782 if ((!ReturnUses && op->isUse()) || in defusechain_iterator()
797 if (Op->isUse()) in advance()
885 if ((!ReturnUses && op->isUse()) || in defusechain_instr_iterator()
900 if (Op->isUse()) in advance()
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| D | MachineOperand.h | 274 bool isUse() const { in isUse() function
333 return !isUndef() && !isInternalRead() && (isUse() || getSubReg()); in readsReg()
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| D | LiveIntervalAnalysis.h | 104 static float getSpillWeight(bool isDef, bool isUse,
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonNewValueJump.cpp | 150 (II->getOperand(i).isUse() || II->getOperand(i).isDef())) { in INITIALIZE_PASS_DEPENDENCY()
572 if (MO.isReg() && MO.isUse()) { in runOnMachineFunction()
579 if (localMO.isReg() && localMO.isUse() && in runOnMachineFunction()
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2ITBlockPass.cpp | 70 if (MO.isUse()) in TrackDefUses()
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| D | A15SDOptimizer.cpp | 194 if ((!MO.isReg()) || (!MO.isUse())) in eraseInstrWithNoUses()
411 if (!MO.isReg() || !MO.isUse()) in getReadDPRs()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsOptimizePICCall.cpp | 110 if (!MO.isReg() || !MO.isUse() || in getCallTargetRegOpnd()
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