| /external/valgrind/main/VEX/priv/ |
| D | host_generic_reg_alloc2.c | 79 HReg rreg; member
96 HReg rreg; member
353 HReg rreg, vreg, vregS, vregD; in doRegisterAllocation() local
429 (*ppReg)(rreg_state[z].rreg); \ in doRegisterAllocation()
470 rreg_state[j].rreg = available_real_regs[j]; in doRegisterAllocation()
613 rreg = reg_usage.hreg[j]; in doRegisterAllocation()
616 if (hregIsVirtual(rreg)) in doRegisterAllocation()
624 if (sameHReg(available_real_regs[k], rreg)) in doRegisterAllocation()
675 rreg_lrs_la[rreg_lrs_used].rreg = rreg; in doRegisterAllocation()
712 rreg_lrs_la[rreg_lrs_used].rreg = available_real_regs[j]; in doRegisterAllocation()
[all …]
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| D | host_mips_defs.c | 2316 void genSpill_MIPS( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2, HReg rreg, in genSpill_MIPS() argument
2321 vassert(!hregIsVirtual(rreg)); in genSpill_MIPS()
2325 switch (hregClass(rreg)) { in genSpill_MIPS()
2328 *i1 = MIPSInstr_Store(8, am, rreg, mode64); in genSpill_MIPS()
2332 *i1 = MIPSInstr_Store(4, am, rreg, mode64); in genSpill_MIPS()
2336 *i1 = MIPSInstr_FpLdSt(False /*Store */ , 4, rreg, am); in genSpill_MIPS()
2339 *i1 = MIPSInstr_FpLdSt(False /*Store */ , 8, rreg, am); in genSpill_MIPS()
2342 ppHRegClass(hregClass(rreg)); in genSpill_MIPS()
2348 void genReload_MIPS( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2, HReg rreg, in genReload_MIPS() argument
2352 vassert(!hregIsVirtual(rreg)); in genReload_MIPS()
[all …]
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| D | host_x86_defs.c | 1707 HReg rreg, Int offsetB, Bool mode64 ) in genSpill_X86() argument
1711 vassert(!hregIsVirtual(rreg)); in genSpill_X86()
1715 switch (hregClass(rreg)) { in genSpill_X86()
1717 *i1 = X86Instr_Alu32M ( Xalu_MOV, X86RI_Reg(rreg), am ); in genSpill_X86()
1720 *i1 = X86Instr_FpLdSt ( False/*store*/, 10, rreg, am ); in genSpill_X86()
1723 *i1 = X86Instr_SseLdSt ( False/*store*/, rreg, am ); in genSpill_X86()
1726 ppHRegClass(hregClass(rreg)); in genSpill_X86()
1732 HReg rreg, Int offsetB, Bool mode64 ) in genReload_X86() argument
1736 vassert(!hregIsVirtual(rreg)); in genReload_X86()
1740 switch (hregClass(rreg)) { in genReload_X86()
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| D | host_x86_defs.h | 726 HReg rreg, Int offset, Bool );
728 HReg rreg, Int offset, Bool );
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| D | host_amd64_defs.h | 765 HReg rreg, Int offset, Bool );
767 HReg rreg, Int offset, Bool );
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| D | host_arm64_defs.h | 1126 HReg rreg, Int offset, Bool );
1128 HReg rreg, Int offset, Bool );
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| D | host_mips_defs.h | 714 HReg rreg, Int offset, Bool);
716 HReg rreg, Int offset, Bool);
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| D | host_arm_defs.h | 1036 HReg rreg, Int offset, Bool );
1038 HReg rreg, Int offset, Bool );
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| D | host_amd64_defs.c | 1859 HReg rreg, Int offsetB, Bool mode64 ) in genSpill_AMD64() argument
1863 vassert(!hregIsVirtual(rreg)); in genSpill_AMD64()
1867 switch (hregClass(rreg)) { in genSpill_AMD64()
1869 *i1 = AMD64Instr_Alu64M ( Aalu_MOV, AMD64RI_Reg(rreg), am ); in genSpill_AMD64()
1872 *i1 = AMD64Instr_SseLdSt ( False/*store*/, 16, rreg, am ); in genSpill_AMD64()
1875 ppHRegClass(hregClass(rreg)); in genSpill_AMD64()
1881 HReg rreg, Int offsetB, Bool mode64 ) in genReload_AMD64() argument
1885 vassert(!hregIsVirtual(rreg)); in genReload_AMD64()
1889 switch (hregClass(rreg)) { in genReload_AMD64()
1891 *i1 = AMD64Instr_Alu64R ( Aalu_MOV, AMD64RMI_Mem(am), rreg ); in genReload_AMD64()
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| D | host_arm64_defs.c | 3225 HReg rreg, Int offsetB, Bool mode64 ) in genSpill_ARM64() argument
3229 vassert(!hregIsVirtual(rreg)); in genSpill_ARM64()
3232 rclass = hregClass(rreg); in genSpill_ARM64()
3240 rreg, in genSpill_ARM64()
3248 rreg, hregARM64_X21(), offsetB); in genSpill_ARM64()
3256 *i2 = ARM64Instr_VLdStQ(False/*!isLoad*/, rreg, x9); in genSpill_ARM64()
3266 HReg rreg, Int offsetB, Bool mode64 ) in genReload_ARM64() argument
3270 vassert(!hregIsVirtual(rreg)); in genReload_ARM64()
3273 rclass = hregClass(rreg); in genReload_ARM64()
3281 rreg, in genReload_ARM64()
[all …]
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| D | host_arm_defs.c | 2571 HReg rreg, Int offsetB, Bool mode64 ) in genSpill_ARM() argument
2575 vassert(!hregIsVirtual(rreg)); in genSpill_ARM()
2578 rclass = hregClass(rreg); in genSpill_ARM()
2583 rreg, in genSpill_ARM()
2603 rreg, in genSpill_ARM()
2607 rreg, in genSpill_ARM()
2616 *i2 = ARMInstr_NLdStQ(False, rreg, mkARMAModeN_R(r12)); in genSpill_ARM()
2626 HReg rreg, Int offsetB, Bool mode64 ) in genReload_ARM() argument
2630 vassert(!hregIsVirtual(rreg)); in genReload_ARM()
2633 rclass = hregClass(rreg); in genReload_ARM()
[all …]
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| D | host_ppc_defs.c | 3027 HReg rreg, Int offsetB, Bool mode64 ) in genSpill_PPC() argument
3030 vassert(!hregIsVirtual(rreg)); in genSpill_PPC()
3033 switch (hregClass(rreg)) { in genSpill_PPC()
3036 *i1 = PPCInstr_Store( 8, am, rreg, mode64 ); in genSpill_PPC()
3040 *i1 = PPCInstr_Store( 4, am, rreg, mode64 ); in genSpill_PPC()
3043 *i1 = PPCInstr_FpLdSt ( False/*store*/, 8, rreg, am ); in genSpill_PPC()
3048 *i1 = PPCInstr_AvLdSt ( False/*store*/, 16, rreg, am ); in genSpill_PPC()
3051 ppHRegClass(hregClass(rreg)); in genSpill_PPC()
3057 HReg rreg, Int offsetB, Bool mode64 ) in genReload_PPC() argument
3060 vassert(!hregIsVirtual(rreg)); in genReload_PPC()
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| D | host_ppc_defs.h | 1147 HReg rreg, Int offsetB, Bool mode64 );
1149 HReg rreg, Int offsetB, Bool mode64 );
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| D | host_s390_defs.c | 463 genSpill_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64) in genSpill_S390() argument
468 vassert(!hregIsVirtual(rreg)); in genSpill_S390()
474 switch (hregClass(rreg)) { in genSpill_S390()
477 *i1 = s390_insn_store(8, am, rreg); in genSpill_S390()
481 ppHRegClass(hregClass(rreg)); in genSpill_S390()
489 genReload_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64) in genReload_S390() argument
494 vassert(!hregIsVirtual(rreg)); in genReload_S390()
500 switch (hregClass(rreg)) { in genReload_S390()
503 *i1 = s390_insn_load(8, rreg, am); in genReload_S390()
507 ppHRegClass(hregClass(rreg)); in genReload_S390()
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| /external/chromium_org/third_party/openmax_dl/dl/api/arm/ |
| D | armCOMM_s.h | 37 .macro _M_GETRREGLIST rreg
42 @ If rreg is lr or r4, save lr and r4
53 @ If rreg = r5 or r6, save up to register r6
63 @ If rreg = r7 or r8, save up to register r8
73 @ If rreg = r9 or r10, save up to register r10
83 @ If rreg = r11 or r12, save up to register r12
157 @ rreg = "" don't stack any registers
166 .macro M_START name, rreg, dreg
177 _M_GETRREGLIST \rreg
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| D | arm64COMM_s.h | 104 .macro M_START name, rreg, dreg
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