/external/libgsm/src/ |
D | short_term.c | 275 register word sri, tmp1, tmp2; variable 279 sri = *wt++; 291 sri = GSM_SUB( sri, tmp2 ); 295 tmp1 = ( tmp1 == MIN_WORD && sri == MIN_WORD 297 : 0x0FFFF & (( (longword)tmp1 * (longword)sri 302 *sr++ = v[0] = sri; 328 register float sri = *wt++; variable 330 sri -= rrpa[i] * va[i]; 331 if (sri < -32768.) sri = -32768.; 332 else if (sri > 32767.) sri = 32767.; [all …]
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/external/llvm/test/MC/AArch64/ |
D | neon-simd-shift.s | 163 sri v0.8b, v1.8b, #3 164 sri v0.4h, v1.4h, #3 165 sri v0.2s, v1.2s, #3 166 sri v0.16b, v1.16b, #3 167 sri v0.8h, v1.8h, #3 168 sri v0.4s, v1.4s, #3 169 sri v0.2d, v1.2d, #3
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D | neon-scalar-shift-imm.s | 110 sri d10, d12, #14
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D | arm64-advsimd.s | 1223 sri d0, d0, #1 define 1272 ; CHECK: sri d0, d0, #1 ; encoding: [0x00,0x44,0x7f,0x7f] 1373 sri.8b v0, v0, #1 1374 sri.16b v0, v0, #2 1375 sri.4h v0, v0, #3 1376 sri.8h v0, v0, #4 1377 sri.2s v0, v0, #5 1378 sri.4s v0, v0, #6 1379 sri.2d v0, v0, #7 1545 ; CHECK: sri.8b v0, v0, #1 ; encoding: [0x00,0x44,0x0f,0x2f] [all …]
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D | neon-diagnostics.s | 1642 sri v0.8b, v1.8h, #3 1643 sri v0.4h, v1.4s, #3 1644 sri v0.2s, v1.2d, #3 1645 sri v0.16b, v1.16b, #9 1646 sri v0.8h, v1.8h, #17 1647 sri v0.4s, v1.4s, #33 1648 sri v0.2d, v1.2d, #65 5075 sri d10, d12, #99
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-sli-sri-opt.ll | 25 ; CHECK: sri.16b v0, v1, #3 35 ; CHECK-NOT: sri
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/external/llvm/utils/TableGen/ |
D | RegisterInfoEmitter.cpp | 1105 for (unsigned sri = 0, sre = SubRegIndices.size(); sri != sre; ++sri) { in runTargetDesc() local 1106 CodeGenSubRegIndex *Idx = SubRegIndices[sri]; in runTargetDesc() 1247 for (unsigned sri = 0, sre = SubRegIndices.size(); sri != sre; ++sri) { in runTargetDesc() local 1248 CodeGenSubRegIndex *Idx = SubRegIndices[sri]; in runTargetDesc()
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D | CodeGenRegisters.cpp | 1797 for (unsigned sri = 0, sre = SubRegIndices.size(); sri != sre; ++sri) { in inferSubClassWithSubReg() local 1798 CodeGenSubRegIndex *SubIdx = SubRegIndices[sri]; in inferSubClassWithSubReg() 1830 for (unsigned sri = 0, sre = SubRegIndices.size(); sri != sre; ++sri) { in inferMatchingSuperRegClass() local 1831 CodeGenSubRegIndex *SubIdx = SubRegIndices[sri]; in inferMatchingSuperRegClass()
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/external/chromium_org/third_party/icu/source/data/locales/ |
D | hr.txt | 429 "sri", 447 "sri", 467 "sri", 485 "sri",
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/external/icu/icu4c/source/data/locales/ |
D | hr.txt | 429 "sri", 447 "sri", 467 "sri", 485 "sri",
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D | bs.txt | 128 "sri",
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/external/nist-sip/java/gov/nist/javax/sip/stack/ |
D | SIPTransactionStack.java | 1313 ServerResponseInterface sri = sipMessageFactory.newSIPServerResponse( in newSIPServerResponse() local 1315 if (sri != null) { in newSIPServerResponse() 1316 currentTransaction.setResponseInterface(sri); in newSIPServerResponse()
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/external/icu/icu4c/source/data/curr/ |
D | sq.txt | 961 one{"rupi sri-lanke"} 962 other{"rupi sri-lanke"}
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D | ee.txt | 592 "sri lankaga rupee", 1737 one{"sri lankaga rupee"} 1738 other{"sri lankaga rupee"}
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/external/chromium_org/third_party/icu/source/data/curr/ |
D | sq.txt | 961 one{"rupi sri-lanke"} 962 other{"rupi sri-lanke"}
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D | ee.txt | 492 "sri lankaga rupee", 1449 one{"sri lankaga rupee"} 1450 other{"sri lankaga rupee"}
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 1792 # CHECK: sri d0, d0, #63 2062 # CHECK: sri.8b v0, v0, #7 2063 # CHECK: sri.16b v0, v0, #6 2064 # CHECK: sri.4h v0, v0, #13 2065 # CHECK: sri.8h v0, v0, #12 2066 # CHECK: sri.2s v0, v0, #27 2067 # CHECK: sri.4s v0, v0, #26 2068 # CHECK: sri.2d v0, v0, #57
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D | neon-instructions.txt | 864 # CHECK: sri v0.8b, v1.8b, #3 865 # CHECK: sri v0.4h, v1.4h, #3 866 # CHECK: sri v0.2s, v1.2s, #3 867 # CHECK: sri v0.16b, v1.16b, #3 868 # CHECK: sri v0.8h, v1.8h, #3 869 # CHECK: sri v0.4s, v1.4s, #3 870 # CHECK: sri v0.2d, v1.2d, #3 1906 # CHECK: sri d10, d12, #14
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/external/chromium_org/third_party/libjpeg_turbo/simd/ |
D | jsimd_arm64_neon.S | 1637 sri v25.8h, v21.8h, #5 1638 sri v25.8h, v29.8h, #11 1682 sri v25.8h, v21.8h, #5 1688 sri v25.8h, v29.8h, #11
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/external/chromium_org/third_party/libjpeg_turbo/ |
D | google.patch | 4132 + sri v25.8h, v21.8h, #5 4133 + sri v25.8h, v29.8h, #11 4177 + sri v25.8h, v21.8h, #5 4183 + sri v25.8h, v29.8h, #11
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 4243 defm SRI : SIMDScalarRShiftDTied< 1, 0b01000, "sri">; 4292 defm SRI : SIMDVectorRShiftBHSDTied<1, 0b01000, "sri", int_aarch64_neon_vsri>;
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/external/srec/config/en.us/dictionary/ |
D | large.ok | 27413 sri srE
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/external/chromium_org/third_party/WebKit/PerformanceTests/Parser/resources/ |
D | final-url-en | 1907 http://blog.rajanr.com/?item=will-disaster-stir-sri-lanka-peace 10838 http://michaelbluejay.com/sri/ 29696 http://www.c-r.org/accord/sri/accord4/background.shtml 40501 http://www.eurekalert.org/pub_releases/2005-05/sri-tse051805.php 81055 http://www.wsws.org/articles/2001/aug2001/sri-a24_prn.shtml
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