| /external/valgrind/main/VEX/test/ |
| D | test-amd64.c | 60 #define CC_S 0x0080 macro
67 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
116 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
357 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
814 TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
815 TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
816 TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
817 TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
818 TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
819 TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
[all …]
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| D | test-i386.c | 50 #define CC_S 0x0080 macro
57 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
106 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
345 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
776 TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
777 TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
778 TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
779 TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
780 TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
781 TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
[all …]
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| D | test-i386-shift.h | 119 | (s ? CC_S : 0) in exec_op()
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| D | test-i386.h | 126 | (s ? CC_S : 0) in exec_op()
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| D | test-amd64-shift.h | 133 | (s ? CC_S : 0) in exec_op()
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| D | test-amd64.h | 117 | (s ? CC_S : 0) in exec_op()
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| /external/valgrind/main/none/tests/x86/ |
| D | x86locked.c | 199 #define CC_S 0x0080 macro
202 #define CC_MASK (CC_C | CC_P | CC_A | CC_Z | CC_S | CC_O)
223 | (s ? CC_S : 0) \
310 | (s ? CC_S : 0) \ in GEN_do_locked_G_E()
412 | (s ? CC_S : 0) \
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| /external/valgrind/main/none/tests/amd64/ |
| D | amd64locked.c | 214 #define CC_S 0x0080 macro
217 #define CC_MASK (CC_C | CC_P | CC_A | CC_Z | CC_S | CC_O)
238 | (s ? CC_S : 0) \
332 | (s ? CC_S : 0) \ in GEN_do_locked_G_E()
448 | (s ? CC_S : 0) \
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| /external/qemu/target-i386/ |
| D | smm_helper.c | 159 cpu_load_eflags(env, 0, ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); in do_smm_enter()
223 ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); in helper_rsm()
239 ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); in helper_rsm()
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| D | cpu.h | 108 #define CC_S 0x0080 macro
1167 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); in cpu_load_eflags()
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| D | svm_helper.c | 197 ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); in helper_vmrun()
561 ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); in helper_vmexit()
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| D | helper.c | 700 eflags & CC_S ? 'S' : '-', in cpu_dump_state()
727 eflags & CC_S ? 'S' : '-', in cpu_dump_state()
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| D | ops_sse.h | 2005 CC_SRC = (valids < upper ? CC_Z : 0) | (validd < upper ? CC_S : 0); in pcmpxstrx()
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| D | translate.c | 6629 tcg_gen_andi_tl(cpu_T[0], cpu_T[0], CC_S | CC_Z | CC_A | CC_P | CC_C); in disas_insn()
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| /external/valgrind/main/memcheck/tests/x86/ |
| D | more_x86_fp.c | 56 #define CC_S 0x0080 macro
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| /external/valgrind/main/memcheck/tests/amd64/ |
| D | more_x87_fp.c | 66 #define CC_S 0x0080 macro
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| /external/qemu/ |
| D | cpu-exec.c | 261 CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); in cpu_exec()
264 env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); in cpu_exec()
551 env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); in cpu_exec()
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| D | nv50_ir_lowering_nv50.cpp | 449 bld.mkOp1(OP_NEG, ty, s, q)->setPredicate(CC_S, cond); in handleDIV()
639 const CondCode cc[4] = { CC_EQU, CC_S, CC_C, CC_O }; in handleTXB()
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| D | nv50_ir.h | 194 CC_S = 0x15, enumerator
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| D | nv50_ir_emit_nv50.cpp | 222 case CC_S: enc = 0x13; break; in emitCondCode()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| D | nv50_ir_lowering_nv50.cpp | 449 bld.mkOp1(OP_NEG, ty, s, q)->setPredicate(CC_S, cond); in handleDIV()
639 const CondCode cc[4] = { CC_EQU, CC_S, CC_C, CC_O }; in handleTXB()
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| D | nv50_ir.h | 194 CC_S = 0x15, enumerator
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| D | nv50_ir_emit_nv50.cpp | 222 case CC_S: enc = 0x13; break; in emitCondCode()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
| D | nv50_ir_emit_nvc0.cpp | 212 case CC_S: val = 0x15; break; in emitCondCode()
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| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| D | nv50_ir_emit_nvc0.cpp | 212 case CC_S: val = 0x15; break; in emitCondCode()
|