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Searched refs:R_SS (Results 1 – 11 of 11) sorted by relevance

/external/qemu/target-i386/
Dseg_helper.c150 } else if (seg_reg == R_SS) { in tss_load_seg()
173 if (seg_reg == R_SS || seg_reg == R_CS) in tss_load_seg()
402 tss_load_seg(env, R_SS, new_segs[R_SS]); in switch_tss()
533 if (env->segs[R_SS].flags & DESC_B_MASK) in do_interrupt_protected()
538 ssp = env->segs[R_SS].base + esp; in do_interrupt_protected()
603 sp_mask = get_sp_mask(env->segs[R_SS].flags); in do_interrupt_protected()
604 ssp = env->segs[R_SS].base; in do_interrupt_protected()
632 PUSHL(ssp, esp, sp_mask, env->segs[R_SS].selector); in do_interrupt_protected()
649 PUSHW(ssp, esp, sp_mask, env->segs[R_SS].selector); in do_interrupt_protected()
668 cpu_x86_load_seg_cache(env, R_SS, ss, in do_interrupt_protected()
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Dhax-all.c734 get_seg(&env->segs[R_SS], &sregs->_ss); in hax_get_segments()
753 set_v8086_seg(&sregs->_ss, &env->segs[R_SS]); in hax_set_segments()
760 set_seg(&sregs->_ss, &env->segs[R_SS]); in hax_set_segments()
811 hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >> in hax_setup_qemu_emulator()
820 env->segs[R_SS].base) != 0) << in hax_setup_qemu_emulator()
Dkvm.c403 set_v8086_seg(&sregs.ss, &env->segs[R_SS]); in kvm_put_sregs()
410 set_seg(&sregs.ss, &env->segs[R_SS]); in kvm_put_sregs()
518 get_seg(&env->segs[R_SS], &sregs.ss); in kvm_get_sregs()
563 hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >> in kvm_get_sregs()
572 env->segs[R_SS].base) != 0) << in kvm_get_sregs()
Dsvm_helper.c148 &env->segs[R_SS]); in helper_vmrun()
205 env, R_SS); in helper_vmrun()
507 &env->segs[R_SS]); in helper_vmexit()
569 env, R_SS); in helper_vmexit()
Dcpu.h74 #define R_SS 2 macro
906 new_hflags = (env->segs[R_SS].flags & DESC_B_MASK) in cpu_x86_load_seg_cache()
922 env->segs[R_SS].base) != 0) << in cpu_x86_load_seg_cache()
Dtranslate.c2240 override = R_SS; in gen_lea_modrm()
2313 override = R_SS; in gen_lea_modrm()
2572 if (seg_reg == R_SS || (s->code32 && seg_reg < R_FS)) in gen_movl_seg_T0()
2576 if (seg_reg == R_SS) in gen_movl_seg_T0()
2644 gen_op_addl_A0_seg(s, R_SS); in gen_push_T0()
2649 gen_op_addl_A0_seg(s, R_SS); in gen_push_T0()
2684 gen_op_addl_A0_seg(s, R_SS); in gen_push_T1()
2688 gen_op_addl_A0_seg(s, R_SS); in gen_push_T1()
2712 gen_op_addl_A0_seg(s, R_SS); in gen_pop_T0()
2715 gen_op_addl_A0_seg(s, R_SS); in gen_pop_T0()
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Dsmm_helper.c165 cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffffffff, 0); in do_smm_enter()
Dhelper.c508 cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff, in cpu_reset()
/external/qemu/
Dgdbstub.c542 case 3: GET_REG32(env->segs[R_SS].selector); in cpu_gdb_read_register()
601 case 3: LOAD_SEG(11, R_SS); return 4; in cpu_gdb_write_register()
/external/valgrind/main/VEX/priv/
Dguest_x86_toIR.c306 #define R_SS 2 macro
489 case R_SS: return OFFB_SS; in segmentGuestRegOffset()
1295 case R_SS: return "%ss"; in nameSReg()
13985 dis_pop_segreg( R_SS, sz ); break; in disInstr_X86_WRK()
14126 dis_push_segreg( R_SS, sz ); break; in disInstr_X86_WRK()
Dguest_amd64_toIR.c467 #define R_SS 2 macro