1 /*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16 #ifndef BIONIC_ATOMIC_X86_H
17 #define BIONIC_ATOMIC_X86_H
18
19 /* Define a full memory barrier, this is only needed if we build the
20 * platform for a multi-core device.
21 */
__bionic_memory_barrier()22 __ATOMIC_INLINE__ void __bionic_memory_barrier() {
23 #if defined(ANDROID_SMP) && ANDROID_SMP == 1
24 __asm__ __volatile__ ( "mfence" : : : "memory" );
25 #else
26 /* A simple compiler barrier. */
27 __asm__ __volatile__ ( "" : : : "memory" );
28 #endif
29 }
30
31 /* Compare-and-swap, without any explicit barriers. Note that this function
32 * returns 0 on success, and 1 on failure. The opposite convention is typically
33 * used on other platforms.
34 */
__bionic_cmpxchg(int32_t old_value,int32_t new_value,volatile int32_t * ptr)35 __ATOMIC_INLINE__ int __bionic_cmpxchg(int32_t old_value, int32_t new_value, volatile int32_t* ptr) {
36 int32_t prev;
37 __asm__ __volatile__ ("lock; cmpxchgl %1, %2"
38 : "=a" (prev)
39 : "q" (new_value), "m" (*ptr), "0" (old_value)
40 : "memory");
41 return prev != old_value;
42 }
43
44 /* Swap, without any explicit barriers. */
__bionic_swap(int32_t new_value,volatile int32_t * ptr)45 __ATOMIC_INLINE__ int32_t __bionic_swap(int32_t new_value, volatile int32_t *ptr) {
46 __asm__ __volatile__ ("xchgl %1, %0"
47 : "=r" (new_value)
48 : "m" (*ptr), "0" (new_value)
49 : "memory");
50 return new_value;
51 }
52
53 /* Atomic decrement, without explicit barriers. */
__bionic_atomic_dec(volatile int32_t * ptr)54 __ATOMIC_INLINE__ int32_t __bionic_atomic_dec(volatile int32_t* ptr) {
55 int increment = -1;
56 __asm__ __volatile__ ("lock; xaddl %0, %1"
57 : "+r" (increment), "+m" (*ptr)
58 : : "memory");
59 /* increment now holds the old value of *ptr */
60 return increment;
61 }
62
63 #endif /* BIONIC_ATOMIC_X86_H */
64