1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPI_LINUX_CYCLADES_H 20 #define _UAPI_LINUX_CYCLADES_H 21 #include <linux/types.h> 22 struct cyclades_monitor { 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 unsigned long int_count; 25 unsigned long char_count; 26 unsigned long char_max; 27 unsigned long char_last; 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 }; 30 struct cyclades_idle_stats { 31 __kernel_time_t in_use; 32 __kernel_time_t recv_idle; 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 __kernel_time_t xmit_idle; 35 unsigned long recv_bytes; 36 unsigned long xmit_bytes; 37 unsigned long overruns; 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 unsigned long frame_errs; 40 unsigned long parity_errs; 41 }; 42 #define CYCLADES_MAGIC 0x4359 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define CYGETMON 0x435901 45 #define CYGETTHRESH 0x435902 46 #define CYSETTHRESH 0x435903 47 #define CYGETDEFTHRESH 0x435904 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define CYSETDEFTHRESH 0x435905 50 #define CYGETTIMEOUT 0x435906 51 #define CYSETTIMEOUT 0x435907 52 #define CYGETDEFTIMEOUT 0x435908 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define CYSETDEFTIMEOUT 0x435909 55 #define CYSETRFLOW 0x43590a 56 #define CYGETRFLOW 0x43590b 57 #define CYSETRTSDTR_INV 0x43590c 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define CYGETRTSDTR_INV 0x43590d 60 #define CYZSETPOLLCYCLE 0x43590e 61 #define CYZGETPOLLCYCLE 0x43590f 62 #define CYGETCD1400VER 0x435910 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define CYSETWAIT 0x435912 65 #define CYGETWAIT 0x435913 66 #define CZIOC ('M' << 8) 67 #define CZ_NBOARDS (CZIOC|0xfa) 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 #define CZ_BOOT_START (CZIOC|0xfb) 70 #define CZ_BOOT_DATA (CZIOC|0xfc) 71 #define CZ_BOOT_END (CZIOC|0xfd) 72 #define CZ_TEST (CZIOC|0xfe) 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 #define CZ_DEF_POLL (HZ/25) 75 #define MAX_BOARD 4 76 #define MAX_DEV 256 77 #define CYZ_MAX_SPEED 921600 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 #define CYZ_FIFO_SIZE 16 80 #define CYZ_BOOT_NWORDS 0x100 81 struct CYZ_BOOT_CTRL { 82 unsigned short nboard; 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 int status[MAX_BOARD]; 85 int nchannel[MAX_BOARD]; 86 int fw_rev[MAX_BOARD]; 87 unsigned long offset; 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 unsigned long data[CYZ_BOOT_NWORDS]; 90 }; 91 #ifndef DP_WINDOW_SIZE 92 #define DP_WINDOW_SIZE (0x00080000) 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 #define ZE_DP_WINDOW_SIZE (0x00100000) 95 #define CTRL_WINDOW_SIZE (0x00000080) 96 struct CUSTOM_REG { 97 __u32 fpga_id; 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 __u32 fpga_version; 100 __u32 cpu_start; 101 __u32 cpu_stop; 102 __u32 misc_reg; 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 __u32 idt_mode; 105 __u32 uart_irq_status; 106 __u32 clear_timer0_irq; 107 __u32 clear_timer1_irq; 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 __u32 clear_timer2_irq; 110 __u32 test_register; 111 __u32 test_count; 112 __u32 timer_select; 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 __u32 pr_uart_irq_status; 115 __u32 ram_wait_state; 116 __u32 uart_wait_state; 117 __u32 timer_wait_state; 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 __u32 ack_wait_state; 120 }; 121 struct RUNTIME_9060 { 122 __u32 loc_addr_range; 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 __u32 loc_addr_base; 125 __u32 loc_arbitr; 126 __u32 endian_descr; 127 __u32 loc_rom_range; 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 __u32 loc_rom_base; 130 __u32 loc_bus_descr; 131 __u32 loc_range_mst; 132 __u32 loc_base_mst; 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 __u32 loc_range_io; 135 __u32 pci_base_mst; 136 __u32 pci_conf_io; 137 __u32 filler1; 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 __u32 filler2; 140 __u32 filler3; 141 __u32 filler4; 142 __u32 mail_box_0; 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 __u32 mail_box_1; 145 __u32 mail_box_2; 146 __u32 mail_box_3; 147 __u32 filler5; 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 __u32 filler6; 150 __u32 filler7; 151 __u32 filler8; 152 __u32 pci_doorbell; 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 __u32 loc_doorbell; 155 __u32 intr_ctrl_stat; 156 __u32 init_ctrl; 157 }; 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 #define WIN_RAM 0x00000001L 160 #define WIN_CREG 0x14000001L 161 #define TIMER_BY_1M 0x00 162 #define TIMER_BY_256K 0x01 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 #define TIMER_BY_128K 0x02 165 #define TIMER_BY_32K 0x03 166 #endif 167 #ifndef ZFIRM_ID 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 #define MAX_CHAN 64 170 #define ID_ADDRESS 0x00000180L 171 #define ZFIRM_ID 0x5557465AL 172 #define ZFIRM_HLT 0x59505B5CL 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 #define ZFIRM_RST 0x56040674L 175 #define ZF_TINACT_DEF 1000 176 #define ZF_TINACT ZF_TINACT_DEF 177 struct FIRM_ID { 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 __u32 signature; 180 __u32 zfwctrl_addr; 181 }; 182 #define C_OS_LINUX 0x00000030 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 #define C_CH_DISABLE 0x00000000 185 #define C_CH_TXENABLE 0x00000001 186 #define C_CH_RXENABLE 0x00000002 187 #define C_CH_ENABLE 0x00000003 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 #define C_CH_LOOPBACK 0x00000004 190 #define C_PR_NONE 0x00000000 191 #define C_PR_ODD 0x00000001 192 #define C_PR_EVEN 0x00000002 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 #define C_PR_MARK 0x00000004 195 #define C_PR_SPACE 0x00000008 196 #define C_PR_PARITY 0x000000ff 197 #define C_PR_DISCARD 0x00000100 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 #define C_PR_IGNORE 0x00000200 200 #define C_DL_CS5 0x00000001 201 #define C_DL_CS6 0x00000002 202 #define C_DL_CS7 0x00000004 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 #define C_DL_CS8 0x00000008 205 #define C_DL_CS 0x0000000f 206 #define C_DL_1STOP 0x00000010 207 #define C_DL_15STOP 0x00000020 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 #define C_DL_2STOP 0x00000040 210 #define C_DL_STOP 0x000000f0 211 #define C_IN_DISABLE 0x00000000 212 #define C_IN_TXBEMPTY 0x00000001 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 #define C_IN_TXLOWWM 0x00000002 215 #define C_IN_RXHIWM 0x00000010 216 #define C_IN_RXNNDT 0x00000020 217 #define C_IN_MDCD 0x00000100 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 #define C_IN_MDSR 0x00000200 220 #define C_IN_MRI 0x00000400 221 #define C_IN_MCTS 0x00000800 222 #define C_IN_RXBRK 0x00001000 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 #define C_IN_PR_ERROR 0x00002000 225 #define C_IN_FR_ERROR 0x00004000 226 #define C_IN_OVR_ERROR 0x00008000 227 #define C_IN_RXOFL 0x00010000 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 #define C_IN_IOCTLW 0x00020000 230 #define C_IN_MRTS 0x00040000 231 #define C_IN_ICHAR 0x00080000 232 #define C_FL_OXX 0x00000001 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 #define C_FL_IXX 0x00000002 235 #define C_FL_OIXANY 0x00000004 236 #define C_FL_SWFLOW 0x0000000f 237 #define C_FS_TXIDLE 0x00000000 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 #define C_FS_SENDING 0x00000001 240 #define C_FS_SWFLOW 0x00000002 241 #define C_RS_PARAM 0x80000000 242 #define C_RS_RTS 0x00000001 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 #define C_RS_DTR 0x00000004 245 #define C_RS_DCD 0x00000100 246 #define C_RS_DSR 0x00000200 247 #define C_RS_RI 0x00000400 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 #define C_RS_CTS 0x00000800 250 #define C_CM_RESET 0x01 251 #define C_CM_IOCTL 0x02 252 #define C_CM_IOCTLW 0x03 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 #define C_CM_IOCTLM 0x04 255 #define C_CM_SENDXOFF 0x10 256 #define C_CM_SENDXON 0x11 257 #define C_CM_CLFLOW 0x12 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 #define C_CM_SENDBRK 0x41 260 #define C_CM_INTBACK 0x42 261 #define C_CM_SET_BREAK 0x43 262 #define C_CM_CLR_BREAK 0x44 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 #define C_CM_CMD_DONE 0x45 265 #define C_CM_INTBACK2 0x46 266 #define C_CM_TINACT 0x51 267 #define C_CM_IRQ_ENBL 0x52 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 #define C_CM_IRQ_DSBL 0x53 270 #define C_CM_ACK_ENBL 0x54 271 #define C_CM_ACK_DSBL 0x55 272 #define C_CM_FLUSH_RX 0x56 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 #define C_CM_FLUSH_TX 0x57 275 #define C_CM_Q_ENABLE 0x58 276 #define C_CM_Q_DISABLE 0x59 277 #define C_CM_TXBEMPTY 0x60 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 #define C_CM_TXLOWWM 0x61 280 #define C_CM_RXHIWM 0x62 281 #define C_CM_RXNNDT 0x63 282 #define C_CM_TXFEMPTY 0x64 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 #define C_CM_ICHAR 0x65 285 #define C_CM_MDCD 0x70 286 #define C_CM_MDSR 0x71 287 #define C_CM_MRI 0x72 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 #define C_CM_MCTS 0x73 290 #define C_CM_MRTS 0x74 291 #define C_CM_RXBRK 0x84 292 #define C_CM_PR_ERROR 0x85 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 #define C_CM_FR_ERROR 0x86 295 #define C_CM_OVR_ERROR 0x87 296 #define C_CM_RXOFL 0x88 297 #define C_CM_CMDERROR 0x90 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 #define C_CM_FATAL 0x91 300 #define C_CM_HW_RESET 0x92 301 struct CH_CTRL { 302 __u32 op_mode; 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 __u32 intr_enable; 305 __u32 sw_flow; 306 __u32 flow_status; 307 __u32 comm_baud; 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 __u32 comm_parity; 310 __u32 comm_data_l; 311 __u32 comm_flags; 312 __u32 hw_flow; 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 __u32 rs_control; 315 __u32 rs_status; 316 __u32 flow_xon; 317 __u32 flow_xoff; 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 __u32 hw_overflow; 320 __u32 sw_overflow; 321 __u32 comm_error; 322 __u32 ichar; 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 __u32 filler[7]; 325 }; 326 struct BUF_CTRL { 327 __u32 flag_dma; 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 __u32 tx_bufaddr; 330 __u32 tx_bufsize; 331 __u32 tx_threshold; 332 __u32 tx_get; 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 __u32 tx_put; 335 __u32 rx_bufaddr; 336 __u32 rx_bufsize; 337 __u32 rx_threshold; 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 __u32 rx_get; 340 __u32 rx_put; 341 __u32 filler[5]; 342 }; 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 struct BOARD_CTRL { 345 __u32 n_channel; 346 __u32 fw_version; 347 __u32 op_system; 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 __u32 dr_version; 350 __u32 inactivity; 351 __u32 hcmd_channel; 352 __u32 hcmd_param; 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 __u32 fwcmd_channel; 355 __u32 fwcmd_param; 356 __u32 zf_int_queue_addr; 357 __u32 filler[6]; 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 }; 360 #define QUEUE_SIZE (10*MAX_CHAN) 361 struct INT_QUEUE { 362 unsigned char intr_code[QUEUE_SIZE]; 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 unsigned long channel[QUEUE_SIZE]; 365 unsigned long param[QUEUE_SIZE]; 366 unsigned long put; 367 unsigned long get; 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 }; 370 struct ZFW_CTRL { 371 struct BOARD_CTRL board_ctrl; 372 struct CH_CTRL ch_ctrl[MAX_CHAN]; 373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 struct BUF_CTRL buf_ctrl[MAX_CHAN]; 375 }; 376 #endif 377 #endif 378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379