1; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s 2; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s 3 4 5define i16 @cvt_i16_f32(float %x) { 6; CHECK: cvt.rzi.u16.f32 %rs{{[0-9]+}}, %f{{[0-9]+}}; 7; CHECK: ret; 8 %a = fptoui float %x to i16 9 ret i16 %a 10} 11 12define i16 @cvt_i16_f64(double %x) { 13; CHECK: cvt.rzi.u16.f64 %rs{{[0-9]+}}, %fl{{[0-9]+}}; 14; CHECK: ret; 15 %a = fptoui double %x to i16 16 ret i16 %a 17} 18 19define i32 @cvt_i32_f32(float %x) { 20; CHECK: cvt.rzi.u32.f32 %r{{[0-9]+}}, %f{{[0-9]+}}; 21; CHECK: ret; 22 %a = fptoui float %x to i32 23 ret i32 %a 24} 25 26define i32 @cvt_i32_f64(double %x) { 27; CHECK: cvt.rzi.u32.f64 %r{{[0-9]+}}, %fl{{[0-9]+}}; 28; CHECK: ret; 29 %a = fptoui double %x to i32 30 ret i32 %a 31} 32 33 34define i64 @cvt_i64_f32(float %x) { 35; CHECK: cvt.rzi.u64.f32 %rl{{[0-9]+}}, %f{{[0-9]+}}; 36; CHECK: ret; 37 %a = fptoui float %x to i64 38 ret i64 %a 39} 40 41define i64 @cvt_i64_f64(double %x) { 42; CHECK: cvt.rzi.u64.f64 %rl{{[0-9]+}}, %fl{{[0-9]+}}; 43; CHECK: ret; 44 %a = fptoui double %x to i64 45 ret i64 %a 46} 47 48define float @cvt_f32_i16(i16 %x) { 49; CHECK: cvt.rn.f32.u16 %f{{[0-9]+}}, %rs{{[0-9]+}}; 50; CHECK: ret; 51 %a = uitofp i16 %x to float 52 ret float %a 53} 54 55define float @cvt_f32_i32(i32 %x) { 56; CHECK: cvt.rn.f32.u32 %f{{[0-9]+}}, %r{{[0-9]+}}; 57; CHECK: ret; 58 %a = uitofp i32 %x to float 59 ret float %a 60} 61 62define float @cvt_f32_i64(i64 %x) { 63; CHECK: cvt.rn.f32.u64 %f{{[0-9]+}}, %rl{{[0-9]+}}; 64; CHECK: ret; 65 %a = uitofp i64 %x to float 66 ret float %a 67} 68 69define float @cvt_f32_f64(double %x) { 70; CHECK: cvt.rn.f32.f64 %f{{[0-9]+}}, %fl{{[0-9]+}}; 71; CHECK: ret; 72 %a = fptrunc double %x to float 73 ret float %a 74} 75 76define float @cvt_f32_s16(i16 %x) { 77; CHECK: cvt.rn.f32.s16 %f{{[0-9]+}}, %rs{{[0-9]+}} 78; CHECK: ret 79 %a = sitofp i16 %x to float 80 ret float %a 81} 82 83define float @cvt_f32_s32(i32 %x) { 84; CHECK: cvt.rn.f32.s32 %f{{[0-9]+}}, %r{{[0-9]+}} 85; CHECK: ret 86 %a = sitofp i32 %x to float 87 ret float %a 88} 89 90define float @cvt_f32_s64(i64 %x) { 91; CHECK: cvt.rn.f32.s64 %f{{[0-9]+}}, %rl{{[0-9]+}} 92; CHECK: ret 93 %a = sitofp i64 %x to float 94 ret float %a 95} 96 97define double @cvt_f64_i16(i16 %x) { 98; CHECK: cvt.rn.f64.u16 %fl{{[0-9]+}}, %rs{{[0-9]+}}; 99; CHECK: ret; 100 %a = uitofp i16 %x to double 101 ret double %a 102} 103 104define double @cvt_f64_i32(i32 %x) { 105; CHECK: cvt.rn.f64.u32 %fl{{[0-9]+}}, %r{{[0-9]+}}; 106; CHECK: ret; 107 %a = uitofp i32 %x to double 108 ret double %a 109} 110 111define double @cvt_f64_i64(i64 %x) { 112; CHECK: cvt.rn.f64.u64 %fl{{[0-9]+}}, %rl{{[0-9]+}}; 113; CHECK: ret; 114 %a = uitofp i64 %x to double 115 ret double %a 116} 117 118define double @cvt_f64_f32(float %x) { 119; CHECK: cvt.f64.f32 %fl{{[0-9]+}}, %f{{[0-9]+}}; 120; CHECK: ret; 121 %a = fpext float %x to double 122 ret double %a 123} 124 125define double @cvt_f64_s16(i16 %x) { 126; CHECK: cvt.rn.f64.s16 %fl{{[0-9]+}}, %rs{{[0-9]+}} 127; CHECK: ret 128 %a = sitofp i16 %x to double 129 ret double %a 130} 131 132define double @cvt_f64_s32(i32 %x) { 133; CHECK: cvt.rn.f64.s32 %fl{{[0-9]+}}, %r{{[0-9]+}} 134; CHECK: ret 135 %a = sitofp i32 %x to double 136 ret double %a 137} 138 139define double @cvt_f64_s64(i64 %x) { 140; CHECK: cvt.rn.f64.s64 %fl{{[0-9]+}}, %rl{{[0-9]+}} 141; CHECK: ret 142 %a = sitofp i64 %x to double 143 ret double %a 144} 145