1; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32 2; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64 3 4 5;; i8 6define i8 @ld_global_i8(i8 addrspace(0)* %ptr) { 7; PTX32: ld.u8 %r{{[0-9]+}}, [%r{{[0-9]+}}] 8; PTX32: ret 9; PTX64: ld.u8 %r{{[0-9]+}}, [%rl{{[0-9]+}}] 10; PTX64: ret 11 %a = load i8 addrspace(0)* %ptr 12 ret i8 %a 13} 14 15;; i16 16define i16 @ld_global_i16(i16 addrspace(0)* %ptr) { 17; PTX32: ld.u16 %r{{[0-9]+}}, [%r{{[0-9]+}}] 18; PTX32: ret 19; PTX64: ld.u16 %r{{[0-9]+}}, [%rl{{[0-9]+}}] 20; PTX64: ret 21 %a = load i16 addrspace(0)* %ptr 22 ret i16 %a 23} 24 25;; i32 26define i32 @ld_global_i32(i32 addrspace(0)* %ptr) { 27; PTX32: ld.u32 %r{{[0-9]+}}, [%r{{[0-9]+}}] 28; PTX32: ret 29; PTX64: ld.u32 %r{{[0-9]+}}, [%rl{{[0-9]+}}] 30; PTX64: ret 31 %a = load i32 addrspace(0)* %ptr 32 ret i32 %a 33} 34 35;; i64 36define i64 @ld_global_i64(i64 addrspace(0)* %ptr) { 37; PTX32: ld.u64 %rl{{[0-9]+}}, [%r{{[0-9]+}}] 38; PTX32: ret 39; PTX64: ld.u64 %rl{{[0-9]+}}, [%rl{{[0-9]+}}] 40; PTX64: ret 41 %a = load i64 addrspace(0)* %ptr 42 ret i64 %a 43} 44 45;; f32 46define float @ld_global_f32(float addrspace(0)* %ptr) { 47; PTX32: ld.f32 %f{{[0-9]+}}, [%r{{[0-9]+}}] 48; PTX32: ret 49; PTX64: ld.f32 %f{{[0-9]+}}, [%rl{{[0-9]+}}] 50; PTX64: ret 51 %a = load float addrspace(0)* %ptr 52 ret float %a 53} 54 55;; f64 56define double @ld_global_f64(double addrspace(0)* %ptr) { 57; PTX32: ld.f64 %fl{{[0-9]+}}, [%r{{[0-9]+}}] 58; PTX32: ret 59; PTX64: ld.f64 %fl{{[0-9]+}}, [%rl{{[0-9]+}}] 60; PTX64: ret 61 %a = load double addrspace(0)* %ptr 62 ret double %a 63} 64