1; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s 2; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-no-infs-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=CHECK-FM %s 3target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 4target triple = "powerpc64-unknown-linux-gnu" 5 6define double @zerocmp1(double %a, double %y, double %z) #0 { 7entry: 8 %cmp = fcmp ult double %a, 0.000000e+00 9 %z.y = select i1 %cmp, double %z, double %y 10 ret double %z.y 11 12; CHECK: @zerocmp1 13; CHECK-NOT: fsel 14; CHECK: blr 15 16; CHECK-FM: @zerocmp1 17; CHECK-FM: fsel 1, 1, 2, 3 18; CHECK-FM: blr 19} 20 21define double @zerocmp2(double %a, double %y, double %z) #0 { 22entry: 23 %cmp = fcmp ogt double %a, 0.000000e+00 24 %y.z = select i1 %cmp, double %y, double %z 25 ret double %y.z 26 27; CHECK: @zerocmp2 28; CHECK-NOT: fsel 29; CHECK: blr 30 31; CHECK-FM: @zerocmp2 32; CHECK-FM: fneg [[REG:[0-9]+]], 1 33; CHECK-FM: fsel 1, [[REG]], 3, 2 34; CHECK-FM: blr 35} 36 37define double @zerocmp3(double %a, double %y, double %z) #0 { 38entry: 39 %cmp = fcmp oeq double %a, 0.000000e+00 40 %y.z = select i1 %cmp, double %y, double %z 41 ret double %y.z 42 43; CHECK: @zerocmp3 44; CHECK-NOT: fsel 45; CHECK: blr 46 47; CHECK-FM: @zerocmp3 48; CHECK-FM: fsel [[REG:[0-9]+]], 1, 2, 3 49; CHECK-FM: fneg [[REG2:[0-9]+]], 1 50; CHECK-FM: fsel 1, [[REG2]], [[REG]], 3 51; CHECK-FM: blr 52} 53 54define double @min1(double %a, double %b) #0 { 55entry: 56 %cmp = fcmp ole double %a, %b 57 %cond = select i1 %cmp, double %a, double %b 58 ret double %cond 59 60; CHECK: @min1 61; CHECK-NOT: fsel 62; CHECK: blr 63 64; CHECK-FM: @min1 65; CHECK-FM: fsub [[REG:[0-9]+]], 2, 1 66; CHECK-FM: fsel 1, [[REG]], 1, 2 67; CHECK-FM: blr 68} 69 70define double @max1(double %a, double %b) #0 { 71entry: 72 %cmp = fcmp oge double %a, %b 73 %cond = select i1 %cmp, double %a, double %b 74 ret double %cond 75 76; CHECK: @max1 77; CHECK-NOT: fsel 78; CHECK: blr 79 80; CHECK-FM: @max1 81; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2 82; CHECK-FM: fsel 1, [[REG]], 1, 2 83; CHECK-FM: blr 84} 85 86define double @cmp1(double %a, double %b, double %y, double %z) #0 { 87entry: 88 %cmp = fcmp ult double %a, %b 89 %z.y = select i1 %cmp, double %z, double %y 90 ret double %z.y 91 92; CHECK: @cmp1 93; CHECK-NOT: fsel 94; CHECK: blr 95 96; CHECK-FM: @cmp1 97; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2 98; CHECK-FM: fsel 1, [[REG]], 3, 4 99; CHECK-FM: blr 100} 101 102define double @cmp2(double %a, double %b, double %y, double %z) #0 { 103entry: 104 %cmp = fcmp ogt double %a, %b 105 %y.z = select i1 %cmp, double %y, double %z 106 ret double %y.z 107 108; CHECK: @cmp2 109; CHECK-NOT: fsel 110; CHECK: blr 111 112; CHECK-FM: @cmp2 113; CHECK-FM: fsub [[REG:[0-9]+]], 2, 1 114; CHECK-FM: fsel 1, [[REG]], 4, 3 115; CHECK-FM: blr 116} 117 118define double @cmp3(double %a, double %b, double %y, double %z) #0 { 119entry: 120 %cmp = fcmp oeq double %a, %b 121 %y.z = select i1 %cmp, double %y, double %z 122 ret double %y.z 123 124; CHECK: @cmp3 125; CHECK-NOT: fsel 126; CHECK: blr 127 128; CHECK-FM: @cmp3 129; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2 130; CHECK-FM: fsel [[REG2:[0-9]+]], [[REG]], 3, 4 131; CHECK-FM: fneg [[REG3:[0-9]+]], [[REG]] 132; CHECK-FM: fsel 1, [[REG3]], [[REG2]], 4 133; CHECK-FM: blr 134} 135 136attributes #0 = { nounwind readnone } 137 138