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1; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
2
3; Normally icmp + select is optimized to select_cc, when this happens the
4; DAGLegalizer never sees the select and doesn't have a chance to leaglize it.
5;
6; In order to avoid the select_cc optimization, this test case calculates the
7; condition for the select in a separate basic block.
8
9; CHECK-LABEL: @select
10; CHECK-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.X
11; CHECK-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.X
12; CHECK-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY
13; CHECK-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY
14; CHECK-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XYZW
15; CHECK-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XYZW
16define void @select (i32 addrspace(1)* %i32out, float addrspace(1)* %f32out,
17                     <2 x i32> addrspace(1)* %v2i32out, <2 x float> addrspace(1)* %v2f32out,
18                     <4 x i32> addrspace(1)* %v4i32out, <4 x float> addrspace(1)* %v4f32out,
19                     i32 %cond) {
20entry:
21  br label %for
22body:
23  %inc = add i32 %i, 1
24  %br_cmp.i = icmp eq i1 %br_cmp, 0
25  br label %for
26for:
27  %i = phi i32 [ %inc, %body], [ 0, %entry ]
28  %br_cmp = phi i1 [ %br_cmp.i, %body ], [ 0, %entry ]
29  %0 = icmp eq i32 %cond, %i
30  %1 = select i1 %br_cmp, i32 2, i32 3
31  %2 = select i1 %br_cmp, float 2.0 , float 5.0
32  %3 = select i1 %br_cmp, <2 x i32> <i32 2, i32 3>, <2 x i32> <i32 4, i32 5>
33  %4 = select i1 %br_cmp, <2 x float> <float 2.0, float 3.0>, <2 x float> <float 4.0, float 5.0>
34  %5 = select i1 %br_cmp, <4 x i32> <i32 2 , i32 3, i32 4, i32 5>, <4 x i32> <i32 6, i32 7, i32 8, i32 9>
35  %6 = select i1 %br_cmp, <4 x float> <float 2.0, float 3.0, float 4.0, float 5.0>, <4 x float> <float 6.0, float 7.0, float 8.0, float 9.0>
36  br i1 %0, label %body, label %done
37
38done:
39  store i32 %1, i32 addrspace(1)* %i32out
40  store float %2, float addrspace(1)* %f32out
41  store <2 x i32> %3, <2 x i32> addrspace(1)* %v2i32out
42  store <2 x float> %4, <2 x float> addrspace(1)* %v2f32out
43  store <4 x i32> %5, <4 x i32> addrspace(1)* %v4i32out
44  store <4 x float> %6, <4 x float> addrspace(1)* %v4f32out
45  ret void
46}
47