1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s 2 3; CHECK-LABEL: test1 4; CHECK: vcmpleps 5; CHECK: vmovups 6; CHECK: ret 7define <16 x float> @test1(<16 x float> %x, <16 x float> %y) nounwind { 8 %mask = fcmp ole <16 x float> %x, %y 9 %max = select <16 x i1> %mask, <16 x float> %x, <16 x float> %y 10 ret <16 x float> %max 11} 12 13; CHECK-LABEL: test2 14; CHECK: vcmplepd 15; CHECK: vmovupd 16; CHECK: ret 17define <8 x double> @test2(<8 x double> %x, <8 x double> %y) nounwind { 18 %mask = fcmp ole <8 x double> %x, %y 19 %max = select <8 x i1> %mask, <8 x double> %x, <8 x double> %y 20 ret <8 x double> %max 21} 22 23; CHECK-LABEL: test3 24; CHECK: vpcmpeqd (%rdi) 25; CHECK: vmovdqu32 26; CHECK: ret 27define <16 x i32> @test3(<16 x i32> %x, <16 x i32> %x1, <16 x i32>* %yp) nounwind { 28 %y = load <16 x i32>* %yp, align 4 29 %mask = icmp eq <16 x i32> %x, %y 30 %max = select <16 x i1> %mask, <16 x i32> %x, <16 x i32> %x1 31 ret <16 x i32> %max 32} 33 34; CHECK-LABEL: @test4_unsigned 35; CHECK: vpcmpnltud 36; CHECK: vmovdqu32 37; CHECK: ret 38define <16 x i32> @test4_unsigned(<16 x i32> %x, <16 x i32> %y) nounwind { 39 %mask = icmp uge <16 x i32> %x, %y 40 %max = select <16 x i1> %mask, <16 x i32> %x, <16 x i32> %y 41 ret <16 x i32> %max 42} 43 44; CHECK-LABEL: test5 45; CHECK: vpcmpeqq {{.*}}%k1 46; CHECK: vmovdqu64 {{.*}}%k1 47; CHECK: ret 48define <8 x i64> @test5(<8 x i64> %x, <8 x i64> %y) nounwind { 49 %mask = icmp eq <8 x i64> %x, %y 50 %max = select <8 x i1> %mask, <8 x i64> %x, <8 x i64> %y 51 ret <8 x i64> %max 52} 53 54; CHECK-LABEL: test6_unsigned 55; CHECK: vpcmpnleuq {{.*}}%k1 56; CHECK: vmovdqu64 {{.*}}%k1 57; CHECK: ret 58define <8 x i64> @test6_unsigned(<8 x i64> %x, <8 x i64> %y) nounwind { 59 %mask = icmp ugt <8 x i64> %x, %y 60 %max = select <8 x i1> %mask, <8 x i64> %x, <8 x i64> %y 61 ret <8 x i64> %max 62} 63 64; CHECK-LABEL: test7 65; CHECK: xor 66; CHECK: vcmpltps 67; CHECK: vblendvps 68; CHECK: ret 69define <4 x float> @test7(<4 x float> %a, <4 x float> %b) { 70 %mask = fcmp olt <4 x float> %a, zeroinitializer 71 %c = select <4 x i1>%mask, <4 x float>%a, <4 x float>%b 72 ret <4 x float>%c 73} 74 75; CHECK-LABEL: test8 76; CHECK: xor 77; CHECK: vcmpltpd 78; CHECK: vblendvpd 79; CHECK: ret 80define <2 x double> @test8(<2 x double> %a, <2 x double> %b) { 81 %mask = fcmp olt <2 x double> %a, zeroinitializer 82 %c = select <2 x i1>%mask, <2 x double>%a, <2 x double>%b 83 ret <2 x double>%c 84} 85 86; CHECK-LABEL: test9 87; CHECK: vpcmpeqd 88; CHECK: vpblendmd 89; CHECK: ret 90define <8 x i32> @test9(<8 x i32> %x, <8 x i32> %y) nounwind { 91 %mask = icmp eq <8 x i32> %x, %y 92 %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %y 93 ret <8 x i32> %max 94} 95 96; CHECK-LABEL: test10 97; CHECK: vcmpeqps 98; CHECK: vblendmps 99; CHECK: ret 100define <8 x float> @test10(<8 x float> %x, <8 x float> %y) nounwind { 101 %mask = fcmp oeq <8 x float> %x, %y 102 %max = select <8 x i1> %mask, <8 x float> %x, <8 x float> %y 103 ret <8 x float> %max 104} 105 106; CHECK-LABEL: test11_unsigned 107; CHECK: vpmaxud 108; CHECK: ret 109define <8 x i32> @test11_unsigned(<8 x i32> %x, <8 x i32> %y) nounwind { 110 %mask = icmp ugt <8 x i32> %x, %y 111 %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %y 112 ret <8 x i32> %max 113} 114 115; CHECK-LABEL: test12 116; CHECK: vpcmpeqq %zmm2, %zmm0, [[LO:%k[0-7]]] 117; CHECK: vpcmpeqq %zmm3, %zmm1, [[HI:%k[0-7]]] 118; CHECK: kunpckbw [[LO]], [[HI]], {{%k[0-7]}} 119 120define i16 @test12(<16 x i64> %a, <16 x i64> %b) nounwind { 121 %res = icmp eq <16 x i64> %a, %b 122 %res1 = bitcast <16 x i1> %res to i16 123 ret i16 %res1 124} 125 126; CHECK-LABEL: test13 127; CHECK: vcmpeqps %zmm 128; CHECK: vpbroadcastd 129; CHECK: ret 130define <16 x i32> @test13(<16 x float>%a, <16 x float>%b) 131{ 132 %cmpvector_i = fcmp oeq <16 x float> %a, %b 133 %conv = zext <16 x i1> %cmpvector_i to <16 x i32> 134 ret <16 x i32> %conv 135} 136 137; CHECK-LABEL: test14 138; CHECK: vpcmp 139; CHECK-NOT: vpcmp 140; CHECK: vmovdqu32 {{.*}}{%k1} {z} 141; CHECK: ret 142define <16 x i32> @test14(<16 x i32>%a, <16 x i32>%b) { 143 %sub_r = sub <16 x i32> %a, %b 144 %cmp.i2.i = icmp sgt <16 x i32> %sub_r, %a 145 %sext.i3.i = sext <16 x i1> %cmp.i2.i to <16 x i32> 146 %mask = icmp eq <16 x i32> %sext.i3.i, zeroinitializer 147 %res = select <16 x i1> %mask, <16 x i32> zeroinitializer, <16 x i32> %sub_r 148 ret <16 x i32>%res 149} 150 151; CHECK-LABEL: test15 152; CHECK: vpcmpgtq 153; CHECK-NOT: vpcmp 154; CHECK: vmovdqu64 {{.*}}{%k1} {z} 155; CHECK: ret 156define <8 x i64> @test15(<8 x i64>%a, <8 x i64>%b) { 157 %sub_r = sub <8 x i64> %a, %b 158 %cmp.i2.i = icmp sgt <8 x i64> %sub_r, %a 159 %sext.i3.i = sext <8 x i1> %cmp.i2.i to <8 x i64> 160 %mask = icmp eq <8 x i64> %sext.i3.i, zeroinitializer 161 %res = select <8 x i1> %mask, <8 x i64> zeroinitializer, <8 x i64> %sub_r 162 ret <8 x i64>%res 163} 164 165