1; RUN: llc -mtriple=x86_64-linux -mcpu=nehalem < %s | FileCheck %s --check-prefix=LIN 2; RUN: llc -mtriple=x86_64-win32 -mcpu=nehalem < %s | FileCheck %s --check-prefix=WIN 3; rdar://7398554 4 5; When doing vector gather-scatter index calculation with 32-bit indices, 6; bounce the vector off of cache rather than shuffling each individual 7; element out of the index vector. 8 9; CHECK: foo: 10; LIN: movaps (%rsi), %xmm0 11; LIN: andps (%rdx), %xmm0 12; LIN: movaps %xmm0, -24(%rsp) 13; LIN: movslq -24(%rsp), %[[REG1:r.+]] 14; LIN: movslq -20(%rsp), %[[REG2:r.+]] 15; LIN: movslq -16(%rsp), %[[REG3:r.+]] 16; LIN: movslq -12(%rsp), %[[REG4:r.+]] 17; LIN: movsd (%rdi,%[[REG1]],8), %xmm0 18; LIN: movhpd (%rdi,%[[REG2]],8), %xmm0 19; LIN: movsd (%rdi,%[[REG3]],8), %xmm1 20; LIN: movhpd (%rdi,%[[REG4]],8), %xmm1 21 22; WIN: movaps (%rdx), %xmm0 23; WIN: andps (%r8), %xmm0 24; WIN: movaps %xmm0, (%rsp) 25; WIN: movslq (%rsp), %[[REG1:r.+]] 26; WIN: movslq 4(%rsp), %[[REG2:r.+]] 27; WIN: movslq 8(%rsp), %[[REG3:r.+]] 28; WIN: movslq 12(%rsp), %[[REG4:r.+]] 29; WIN: movsd (%rcx,%[[REG1]],8), %xmm0 30; WIN: movhpd (%rcx,%[[REG2]],8), %xmm0 31; WIN: movsd (%rcx,%[[REG3]],8), %xmm1 32; WIN: movhpd (%rcx,%[[REG4]],8), %xmm1 33 34define <4 x double> @foo(double* %p, <4 x i32>* %i, <4 x i32>* %h) nounwind { 35 %a = load <4 x i32>* %i 36 %b = load <4 x i32>* %h 37 %j = and <4 x i32> %a, %b 38 %d0 = extractelement <4 x i32> %j, i32 0 39 %d1 = extractelement <4 x i32> %j, i32 1 40 %d2 = extractelement <4 x i32> %j, i32 2 41 %d3 = extractelement <4 x i32> %j, i32 3 42 %q0 = getelementptr double* %p, i32 %d0 43 %q1 = getelementptr double* %p, i32 %d1 44 %q2 = getelementptr double* %p, i32 %d2 45 %q3 = getelementptr double* %p, i32 %d3 46 %r0 = load double* %q0 47 %r1 = load double* %q1 48 %r2 = load double* %q2 49 %r3 = load double* %q3 50 %v0 = insertelement <4 x double> undef, double %r0, i32 0 51 %v1 = insertelement <4 x double> %v0, double %r1, i32 1 52 %v2 = insertelement <4 x double> %v1, double %r2, i32 2 53 %v3 = insertelement <4 x double> %v2, double %r3, i32 3 54 ret <4 x double> %v3 55} 56