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1 /*
2  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
3  * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
4  * Copyright (c) 2008 Red Hat Inc.
5  * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6  * Copyright (c) 2007-2008 Intel Corporation
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a
9  * copy of this software and associated documentation files (the "Software"),
10  * to deal in the Software without restriction, including without limitation
11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12  * and/or sell copies of the Software, and to permit persons to whom the
13  * Software is furnished to do so, subject to the following conditions:
14  *
15  * The above copyright notice and this permission notice shall be included in
16  * all copies or substantial portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24  * IN THE SOFTWARE.
25  */
26 
27 #ifndef _DRM_MODE_H
28 #define _DRM_MODE_H
29 
30 #define DRM_DISPLAY_INFO_LEN	32
31 #define DRM_CONNECTOR_NAME_LEN	32
32 #define DRM_DISPLAY_MODE_LEN	32
33 #define DRM_PROP_NAME_LEN	32
34 
35 #define DRM_MODE_TYPE_BUILTIN	(1<<0)
36 #define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
37 #define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
38 #define DRM_MODE_TYPE_PREFERRED	(1<<3)
39 #define DRM_MODE_TYPE_DEFAULT	(1<<4)
40 #define DRM_MODE_TYPE_USERDEF	(1<<5)
41 #define DRM_MODE_TYPE_DRIVER	(1<<6)
42 
43 /* Video mode flags */
44 /* bit compatible with the xorg definitions. */
45 #define DRM_MODE_FLAG_PHSYNC	(1<<0)
46 #define DRM_MODE_FLAG_NHSYNC	(1<<1)
47 #define DRM_MODE_FLAG_PVSYNC	(1<<2)
48 #define DRM_MODE_FLAG_NVSYNC	(1<<3)
49 #define DRM_MODE_FLAG_INTERLACE	(1<<4)
50 #define DRM_MODE_FLAG_DBLSCAN	(1<<5)
51 #define DRM_MODE_FLAG_CSYNC	(1<<6)
52 #define DRM_MODE_FLAG_PCSYNC	(1<<7)
53 #define DRM_MODE_FLAG_NCSYNC	(1<<8)
54 #define DRM_MODE_FLAG_HSKEW	(1<<9) /* hskew provided */
55 #define DRM_MODE_FLAG_BCAST	(1<<10)
56 #define DRM_MODE_FLAG_PIXMUX	(1<<11)
57 #define DRM_MODE_FLAG_DBLCLK	(1<<12)
58 #define DRM_MODE_FLAG_CLKDIV2	(1<<13)
59 #define DRM_MODE_FLAG_PAR16_9	(1<<14)
60 #define DRM_MODE_FLAG_PAR4_3	(1<<15)
61 
62 /* DPMS flags */
63 /* bit compatible with the xorg definitions. */
64 #define DRM_MODE_DPMS_ON	0
65 #define DRM_MODE_DPMS_STANDBY	1
66 #define DRM_MODE_DPMS_SUSPEND	2
67 #define DRM_MODE_DPMS_OFF	3
68 
69 /* Scaling mode options */
70 #define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
71 					     software can still scale) */
72 #define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
73 #define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
74 #define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
75 
76 /* Dithering mode options */
77 #define DRM_MODE_DITHERING_OFF	0
78 #define DRM_MODE_DITHERING_ON	1
79 #define DRM_MODE_DITHERING_AUTO 2
80 
81 /* Dirty info options */
82 #define DRM_MODE_DIRTY_OFF      0
83 #define DRM_MODE_DIRTY_ON       1
84 #define DRM_MODE_DIRTY_ANNOTATE 2
85 
86 struct drm_mode_modeinfo {
87 	__u32 clock;
88 	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
89 	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
90 
91 	__u32 vrefresh;
92 
93 	__u32 flags;
94 	__u32 type;
95 	char name[DRM_DISPLAY_MODE_LEN];
96 };
97 
98 struct drm_mode_card_res {
99 	__u64 fb_id_ptr;
100 	__u64 crtc_id_ptr;
101 	__u64 connector_id_ptr;
102 	__u64 encoder_id_ptr;
103 	__u32 count_fbs;
104 	__u32 count_crtcs;
105 	__u32 count_connectors;
106 	__u32 count_encoders;
107 	__u32 min_width, max_width;
108 	__u32 min_height, max_height;
109 };
110 
111 struct drm_mode_crtc {
112 	__u64 set_connectors_ptr;
113 	__u32 count_connectors;
114 
115 	__u32 crtc_id; /**< Id */
116 	__u32 fb_id; /**< Id of framebuffer */
117 
118 	__u32 x, y; /**< Position on the frameuffer */
119 
120 	__u32 gamma_size;
121 	__u32 mode_valid;
122 	struct drm_mode_modeinfo mode;
123 };
124 
125 #define DRM_MODE_ENCODER_NONE	0
126 #define DRM_MODE_ENCODER_DAC	1
127 #define DRM_MODE_ENCODER_TMDS	2
128 #define DRM_MODE_ENCODER_LVDS	3
129 #define DRM_MODE_ENCODER_TVDAC	4
130 #define DRM_MODE_ENCODER_MIPI   5
131 
132 struct drm_mode_get_encoder {
133 	__u32 encoder_id;
134 	__u32 encoder_type;
135 
136 	__u32 crtc_id; /**< Id of crtc */
137 
138 	__u32 possible_crtcs;
139 	__u32 possible_clones;
140 };
141 
142 /* This is for connectors with multiple signal types. */
143 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
144 #define DRM_MODE_SUBCONNECTOR_Automatic	0
145 #define DRM_MODE_SUBCONNECTOR_Unknown	0
146 #define DRM_MODE_SUBCONNECTOR_DVID	3
147 #define DRM_MODE_SUBCONNECTOR_DVIA	4
148 #define DRM_MODE_SUBCONNECTOR_Composite	5
149 #define DRM_MODE_SUBCONNECTOR_SVIDEO	6
150 #define DRM_MODE_SUBCONNECTOR_Component	8
151 #define DRM_MODE_SUBCONNECTOR_SCART	9
152 
153 #define DRM_MODE_CONNECTOR_Unknown	0
154 #define DRM_MODE_CONNECTOR_VGA		1
155 #define DRM_MODE_CONNECTOR_DVII		2
156 #define DRM_MODE_CONNECTOR_DVID		3
157 #define DRM_MODE_CONNECTOR_DVIA		4
158 #define DRM_MODE_CONNECTOR_Composite	5
159 #define DRM_MODE_CONNECTOR_SVIDEO	6
160 #define DRM_MODE_CONNECTOR_LVDS		7
161 #define DRM_MODE_CONNECTOR_Component	8
162 #define DRM_MODE_CONNECTOR_9PinDIN	9
163 #define DRM_MODE_CONNECTOR_DisplayPort	10
164 #define DRM_MODE_CONNECTOR_HDMIA	11
165 #define DRM_MODE_CONNECTOR_HDMIB	12
166 #define DRM_MODE_CONNECTOR_TV		13
167 #define DRM_MODE_CONNECTOR_eDP		14
168 #define DRM_MODE_CONNECTOR_MIPI         15
169 
170 struct drm_mode_get_connector {
171 
172 	__u64 encoders_ptr;
173 	__u64 modes_ptr;
174 	__u64 props_ptr;
175 	__u64 prop_values_ptr;
176 
177 	__u32 count_modes;
178 	__u32 count_props;
179 	__u32 count_encoders;
180 
181 	__u32 encoder_id; /**< Current Encoder */
182 	__u32 connector_id; /**< Id */
183 	__u32 connector_type;
184 	__u32 connector_type_id;
185 
186 	__u32 connection;
187 	__u32 mm_width, mm_height; /**< HxW in millimeters */
188 	__u32 subpixel;
189 
190 	__u32 pad;
191 };
192 
193 #define DRM_MODE_PROP_PENDING	(1<<0)
194 #define DRM_MODE_PROP_RANGE	(1<<1)
195 #define DRM_MODE_PROP_IMMUTABLE	(1<<2)
196 #define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
197 #define DRM_MODE_PROP_BLOB	(1<<4)
198 
199 struct drm_mode_property_enum {
200 	__u64 value;
201 	char name[DRM_PROP_NAME_LEN];
202 };
203 
204 struct drm_mode_get_property {
205 	__u64 values_ptr; /* values and blob lengths */
206 	__u64 enum_blob_ptr; /* enum and blob id ptrs */
207 
208 	__u32 prop_id;
209 	__u32 flags;
210 	char name[DRM_PROP_NAME_LEN];
211 
212 	__u32 count_values;
213 	__u32 count_enum_blobs;
214 };
215 
216 struct drm_mode_connector_set_property {
217 	__u64 value;
218 	__u32 prop_id;
219 	__u32 connector_id;
220 };
221 
222 struct drm_mode_get_blob {
223 	__u32 blob_id;
224 	__u32 length;
225 	__u64 data;
226 };
227 
228 struct drm_mode_fb_cmd {
229 	__u32 fb_id;
230 	__u32 width, height;
231 	__u32 pitch;
232 	__u32 bpp;
233 	__u32 depth;
234 	/* driver specific handle */
235 	__u32 handle;
236 };
237 
238 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
239 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
240 #define DRM_MODE_FB_DIRTY_FLAGS         0x03
241 
242 #define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
243 
244 /*
245  * Mark a region of a framebuffer as dirty.
246  *
247  * Some hardware does not automatically update display contents
248  * as a hardware or software draw to a framebuffer. This ioctl
249  * allows userspace to tell the kernel and the hardware what
250  * regions of the framebuffer have changed.
251  *
252  * The kernel or hardware is free to update more then just the
253  * region specified by the clip rects. The kernel or hardware
254  * may also delay and/or coalesce several calls to dirty into a
255  * single update.
256  *
257  * Userspace may annotate the updates, the annotates are a
258  * promise made by the caller that the change is either a copy
259  * of pixels or a fill of a single color in the region specified.
260  *
261  * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
262  * the number of updated regions are half of num_clips given,
263  * where the clip rects are paired in src and dst. The width and
264  * height of each one of the pairs must match.
265  *
266  * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
267  * promises that the region specified of the clip rects is filled
268  * completely with a single color as given in the color argument.
269  */
270 
271 struct drm_mode_fb_dirty_cmd {
272 	__u32 fb_id;
273 	__u32 flags;
274 	__u32 color;
275 	__u32 num_clips;
276 	__u64 clips_ptr;
277 };
278 
279 struct drm_mode_mode_cmd {
280 	__u32 connector_id;
281 	struct drm_mode_modeinfo mode;
282 };
283 
284 #define DRM_MODE_CURSOR_BO	(1<<0)
285 #define DRM_MODE_CURSOR_MOVE	(1<<1)
286 
287 /*
288  * depending on the value in flags different members are used.
289  *
290  * CURSOR_BO uses
291  *    crtc
292  *    width
293  *    height
294  *    handle - if 0 turns the cursor of
295  *
296  * CURSOR_MOVE uses
297  *    crtc
298  *    x
299  *    y
300  */
301 struct drm_mode_cursor {
302 	__u32 flags;
303 	__u32 crtc_id;
304 	__s32 x;
305 	__s32 y;
306 	__u32 width;
307 	__u32 height;
308 	/* driver specific handle */
309 	__u32 handle;
310 };
311 
312 struct drm_mode_crtc_lut {
313 	__u32 crtc_id;
314 	__u32 gamma_size;
315 
316 	/* pointers to arrays */
317 	__u64 red;
318 	__u64 green;
319 	__u64 blue;
320 };
321 
322 #define DRM_MODE_PAGE_FLIP_EVENT 0x01
323 #define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
324 
325 /*
326  * Request a page flip on the specified crtc.
327  *
328  * This ioctl will ask KMS to schedule a page flip for the specified
329  * crtc.  Once any pending rendering targeting the specified fb (as of
330  * ioctl time) has completed, the crtc will be reprogrammed to display
331  * that fb after the next vertical refresh.  The ioctl returns
332  * immediately, but subsequent rendering to the current fb will block
333  * in the execbuffer ioctl until the page flip happens.  If a page
334  * flip is already pending as the ioctl is called, EBUSY will be
335  * returned.
336  *
337  * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
338  * request that drm sends back a vblank event (see drm.h: struct
339  * drm_event_vblank) when the page flip is done.  The user_data field
340  * passed in with this ioctl will be returned as the user_data field
341  * in the vblank event struct.
342  *
343  * The reserved field must be zero until we figure out something
344  * clever to use it for.
345  */
346 
347 struct drm_mode_crtc_page_flip {
348 	__u32 crtc_id;
349 	__u32 fb_id;
350 	__u32 flags;
351 	__u32 reserved;
352 	__u64 user_data;
353 };
354 
355 /* create a dumb scanout buffer */
356 struct drm_mode_create_dumb {
357 	uint32_t height;
358 	uint32_t width;
359 	uint32_t bpp;
360 	uint32_t flags;
361 	/* handle, pitch, size will be returned */
362 	uint32_t handle;
363 	uint32_t pitch;
364 	uint64_t size;
365 };
366 
367 /* set up for mmap of a dumb scanout buffer */
368 struct drm_mode_map_dumb {
369 	/** Handle for the object being mapped. */
370 	__u32 handle;
371 	__u32 pad;
372 	/**
373 	 * Fake offset to use for subsequent mmap call
374 	 *
375 	 * This is a fixed-size type for 32/64 compatibility.
376 	 */
377 	__u64 offset;
378 };
379 
380 struct drm_mode_destroy_dumb {
381 	uint32_t handle;
382 };
383 
384 #endif
385