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1Android Native CPU ABI Management
2
3
4Introduction:
5=============
6
7Every piece of native code generated with the Android NDK matches a given
8"Application Binary Interface" (ABI) that defines exactly how your
9application's machine code is expected to interact with the system at
10runtime.
11
12A typical ABI describes things in *excruciating* details, and will typically
13include the following information:
14
15  - the CPU instruction set that the machine code should use
16
17  - the endianness of memory stores and loads at runtime
18
19  - the format of executable binaries (shared libraries, programs, etc...)
20    and what type of content is allowed/supported in them.
21
22  - various conventions used to pass data between your code and
23    the system (e.g. how registers and/or the stack are used when functions
24    are called, alignment constraints, etc...)
25
26  - alignment and size constraints for enum types, structure fields and
27    arrays.
28
29  - the list of function symbols available to your machine code at runtime,
30    generally from a very specific selected set of libraries.
31
32This document lists the exact ABIs supported by the Android NDK and the
33official Android platform releases.
34
35
36- - - -
37I. Supported ABIs:
38==================
39
40Each supported ABI is identified by a unique name.
41
42
43I.1. 'armeabi'
44--------------
45
46  This is the name of an ABI for ARM-based CPUs that support *at* *least*
47  the ARMv5TE instruction set. Please refer to following documentation for
48  more details:
49
50   - ARM Architecture Reference manual                (a.k.a  ARMARM)
51   - Procedure Call Standard for the ARM Architecture (a.k.a. AAPCS)
52   - ELF for the ARM Architecture                     (a.k.a. ARMELF)
53   - ABI for the ARM Architecture                     (a.k.a. BSABI)
54   - Base Platform ABI for the ARM Architecture       (a.k.a. BPABI)
55   - C Library ABI for the ARM Architecture           (a.k.a. CLIABI)
56   - C++ ABI for the ARM Architecture                 (a.k.a. CPPABI)
57   - Runtime ABI for the ARM Architecture             (a.k.a. RTABI)
58
59   - ELF System V Application Binary Interface
60     (DRAFT - 24 April 2001)
61
62   - Generic C++ ABI  (http://mentorembedded.github.com/cxx-abi/abi.html)
63
64  Note that the AAPCS standard defines 'EABI' as a moniker used to specify
65  a _family_ of similar but distinct ABIs. Android follows the little-endian
66  ARM GNU/Linux ABI as documented in the following document:
67
68>  http://sourcery.mentor.com/sgpp/lite/arm/portal/kbattach142/arm_gnu_linux_abi.pdf
69
70  With the exception that wchar_t is only one byte. This should not matter
71  in practice since wchar_t is simply *not* really supported by the Android
72  platform anyway.
73
74  This ABI does *not* support hardware-assisted floating point computations.
75  Instead, all FP operations are performed through software helper functions
76  that come from the compiler's libgcc.a static library.
77
78  Thumb (a.k.a. Thumb-1) instructions are supported. Note that the NDK
79  will generate thumb code by default, unless you define LOCAL_ARM_MODE
80  in your Android.mk (see docs/ANDROID-MK.html for all details).
81
82
83I.2. 'armeabi-v7a'
84------------------
85
86  This is the name of another ARM-based CPU ABI that *extends* 'armeabi' to
87  include a few CPU instruction set extensions as described in the following
88  document:
89
90  - ARM Architecture v7-a Reference Manual
91
92  The instruction extensions supported by this Android-specific ABI are:
93
94  - The Thumb-2 instruction set extension.
95  - The VFP hardware FPU instructions.
96
97  More specifically, VFPv3-D16 is being used, which corresponds to 16
98  dedicated 64-bit floating point registers provided by the CPU.
99
100  Other extensions described by the v7-a ARM like Advanced SIMD (a.k.a. NEON),
101  VFPv3-D32 or ThumbEE are optional to this ABI, which means that developers
102  should check *at* *runtime* whether the extensions are available and provide
103  alternative code paths if this is not the case.
104
105  (Just like one typically does on x86 systems to check/use MMX/SSE2/etc...
106   specialized instructions).
107
108  You can check docs/CPU-FEATURES.html to see how to perform these runtime
109  checks, and docs/CPU-ARM-NEON.html to learn about the NDK's support for
110  building NEON-capable machine code too.
111
112  IMPORTANT NOTE: This ABI enforces that all double values are passed during
113  function calls in 'core' register pairs, instead of dedicated FP ones, via
114  switch -mfloat-abi=softfp.  However, all internal computations can be performed
115  with the FP registers and will be greatly sped up.
116
117  This little constraint, while resulting in a slight decrease of
118  performance, ensures binary compatibility with all existing 'armeabi'
119  binaries.
120
121  Starting from r9b, it's possible to compile code in -mhard-float and still link
122  with Android native APIs which follow softfp.  Please see
123  tests/device/hard-float/jni/Android.mk for details
124
125  IMPORTANT NOTE: The 'armeabi-v7a' machine code will *not* run on ARMv5 or
126                  ARMv6 based devices.
127
128
129I.3. 'x86'
130----------
131
132  This is the name of an ABI for CPUs supporting the instruction set
133  commonly named 'x86' or 'IA-32'. More specifically, this ABI corresponds
134  to the following:
135
136  - instructions normally generated by GCC with the following compiler
137    flags:
138
139          -march=i686 -mtune=intel -mstackrealign -mssse3 -mfpmath=sse -m32
140
141    which targets Pentium Pro instruction set, according to the GCC
142    documentation, plus the MMX, SSE, SSE2, SSE3, SSSE3 instruction set
143    extensions. Generated code is a balanced optimization across top Intel
144    32-bit CPUs.
145
146    IMPORTANT NOTE: Flags above are not optimization guide. Compiler
147    optimization options which are used by default and/or recommended for
148    performance boost on x86 are not included. For performance optimization
149    hints on x86 GCC please refer to the following article:
150
151> http://software.intel.com/blogs/2012/09/26/gcc-x86-performance-hints
152
153  - using the standard Linux x86 32-bit calling convention (e.g. section 6,
154    "Register Usage" of the "Calling conventions..." document below), not
155    the SVR4 one.
156
157  The ABI does *not* include any other optional IA-32 instruction set
158  extension, including, but not limited to:
159
160  - the MOVBE instruction
161  - any variant of "SSE4"
162
163  You can still use these, as long as you use runtime feature probing to
164  enable them, and provide fallbacks for devices that do not support them.
165
166  Please refer to the following documents for more details:
167
168  * http://gcc.gnu.org/onlinedocs/gcc/i386-and-x86_002d64-Options.html
169
170  * Calling conventions for different C++ compilers and operating systems:
171>    http://www.agner.org/optimize/calling_conventions.pdf
172
173  * Intel IA-32 Intel Architecture Software Developer's Manual
174    volume 2: Instruction Set Reference
175
176  * Intel IA-32 Intel Architecture Software Developer's Manual
177    volume 3: System Programming
178
179  * Amendment to System V Application Binary Interface
180    Intel386 Processor Architecture Supplement
181
182
183I.4. 'mips'
184-----------
185
186  This is the name of an ABI for MIPS-based CPUs that support *at* *least*
187  the MIPS32r1 instruction set. The ABI includes the following features:
188
189   - MIPS32 revision 1 ISA
190   - Little-Endian
191   - O32
192   - Hard-Float
193   - no DSP application specific extensions
194
195  Please refer to following documentation for more details:
196
197   - ELF for the MIPS Architecture                    (a.k.a. MIPSELF)
198   - FAQ for MIPS Toolchains                          (a.k.a. MIPSFAQ)
199   - Toolchain Specifics                              (a.k.a. MIPSTOOL)
200   - SDE Library                                      (a.k.a. MIPSSDE)
201   - Instruction Set Quick Reference                  (a.k.a. MIPSISA)
202   - Architecture for Programmers                     (a.k.a. MIPSARCH)
203   - ELF System V Application Binary Interface
204     (DRAFT - 24 April 2001)
205   - Generic C++ ABI  (http://sourcery.mentor.com/public/cxx-abi/abi.html)
206
207  The MIPS specific documentation is available at:
208> http://www.mips.com/products/product-materials/processor/mips-architecture/
209
210> https://sourcery.mentor.com/sgpp/lite/mips/portal/target_arch?@action=faq&target_arch=MIPS
211
212  Note: This ABI assumes a CPU:FPU clock ratio of 2:1 for maximum
213  compatibility.
214
215  Note: that MIPS16 support is not provided, nor is micromips.
216
217
218I.5. 'x86-64'
219----------
220
221  This is the name of an ABI for CPUs supporting the instruction set
222  commonly named 'x86-64'. More specifically, this ABI corresponds
223  to the following:
224
225  - instructions normally generated by GCC with the following compiler
226    flags:
227
228          -march=x86-64 -msse4.2 -mpopcnt -m64 -mtune=intel
229
230    which targets x86-64 instruction set, according to the GCC
231    documentation, plus the MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
232    SSE4.2 and POPCNT instruction set extensions. Generated code is a balanced
233    optimization across top Intel 64-bit CPUs.
234
235    IMPORTANT NOTE: Flags above are not optimization guide. Compiler
236    optimization options which are used by default and/or recommended for
237    performance boost on x86-64 are not included. For performance
238    optimization hints on x86-64 GCC please refer to the following
239    article:
240
241> http://software.intel.com/blogs/2012/09/26/gcc-x86-performance-hints
242
243  The ABI does *not* include any other optional x86-64 instruction set
244  extension, including, but not limited to:
245
246  - the MOVBE instruction
247  - the SHA instruction
248  - the AVX extension
249  - the AVX2 extension
250
251  You can still use these, as long as you use runtime feature probing to
252  enable them, and provide fallbacks for devices that do not support them.
253
254  Please refer to the following documents for more details:
255
256  * http://gcc.gnu.org/onlinedocs/gcc/i386-and-x86_002d64-Options.html
257
258  * Calling conventions for different C++ compilers and operating systems:
259>    http://www.agner.org/optimize/calling_conventions.pdf
260
261  * Intel64 and IA-32 Intel Architecture Software Developer's Manual
262    volume 2: Instruction Set Reference
263
264  * Intel64 and IA-32 Intel Architecture Software Developer's Manual
265    volume 3: System Programming
266
267  * Amendment to System V Application Binary Interface
268    AMD64 Processor Architecture Supplement
269
270- - - -
271II. Generating code for a specific ABI:
272=======================================
273
274By default, the NDK will generate machine code for the 'armeabi' ABI.
275You can however add the following line to your Application.mk to generate
276ARMv7-a compatible machine code instead:
277
278        APP_ABI := armeabi-v7a
279
280It is also possible to build machine code for two or more distinct ABIs,
281for example:
282
283        APP_ABI := armeabi armeabi-v7a
284
285This will instruct the NDK to build two versions of your machine code: one for
286each ABI listed on this line. Both libraries will be copied to your application
287project path and will be ultimately packaged into your .apk.
288
289Such a package is called a "fat binary" in Android speak since it contains
290machine code for more than one CPU architecture. At installation time, the
291package manager will only unpack the most appropriate machine code for the
292target device. See below for details.
293
294Also you can use:
295
296        APP_ABI := all
297
298which will generate machine code for all supported ABIs with this NDK. Doing so
299will ensure that your application package contains libraries for all target ABIs.
300Note that this has an impact on package size, since each ABI will correspond to
301its own set of native libraries built from the same sources.
302
303
304- - - -
305III. ABI Management on the Android platform:
306============================================
307
308This section provides specific details about how the Android platform manages
309native code in application packages.
310
311
312III.1. Native code in Application Packages:
313-------------------------------------------
314
315It is expected that shared libraries generated with the NDK are stored in
316the final application package (.apk) at locations of the form:
317
318       lib/<abi>/lib<name>.so
319
320Where <abi> is one of the ABI names listed in section II above, and <name>
321is a name that can be used when loading the shared library from the VM
322as in:
323
324        System.loadLibrary("<name>");
325
326Since .apk files are just zip files, you can trivially list their content
327with a command like:
328
329        unzip -l <apk>
330
331to verify that the native shared libraries you want are indeed at the
332proper location. You can also place native shared libraries at other
333locations within the .apk, but they will be ignored by the system, or more
334precisely by the steps described below; you will need to extract/install
335them manually in your application.
336
337In the case of a "fat" binary, up to four distinct libraries can be placed
338in the  .apk, for example at:
339
340        lib/armeabi/libfoo.so
341        lib/armeabi-v7a/libfoo.so
342        lib/x86/libfoo.so
343        lib/x86-64/libfoo.so
344        lib/mips/libfoo.so
345
346IMPORTANT NOTE: ARMv7-based Android device running 4.0.3 or before installs native
347library from the 'armeabi' directory instead of 'armeabi-v7a' directory if both
348exist and 'lib/armeabi' is listed after 'lib/armeabi-v7a' in apk.  This issue is
349fixed in 4.0.4 or later.
350
351
352III.2. Android Platform ABI support:
353------------------------------------
354
355The Android system knows at runtime which ABI(s) it supports. More
356precisely, up to two build-specific system properties are used to
357indicate:
358
359- the 'primary' ABI for the device, corresponding to the machine
360  code used in the system image itself.
361
362- an optional 'secondary' ABI, corresponding to another ABI that
363  is also supported by the system image.
364
365To achieve the best performance for your NDK component, you should compile
366directly for the primary ABI.
367
368For example, a typical ARMv5TE-based device would only define
369the primary ABI as '`armeabi`' and not define a secondary one.
370
371On the other hand, a typical ARMv7-based device would define the
372primary ABI to '`armeabi-v7a`' and the secondary one to '`armeabi`'
373since it can run application native binaries generated for both
374of them.
375
376Many x86-based devices can also run armeabi-v7a and armeabi NDK
377binaries and define the primary ABI to '`x86`' and the secondary
378one to '`armeabi-v7a`'.
379
380A typical MIPS-based device only defines a primary abi named '`mips`'.
381
382III.3. Automatic extraction of native code at install time:
383-----------------------------------------------------------
384
385When installing an application, the package manager service will scan
386the .apk and look for any shared library of the form:
387
388         lib/<primary-abi>/lib<name>.so
389
390If one is found, then it is copied under `$APPDIR/lib/lib<name>.so`,
391where `$APPDIR` corresponds to the application's specific data directory.
392
393If none is found, and a secondary ABI is defined, the service will
394then scan for shared libraries of the form:
395
396        lib/<secondary-abi>/lib<name>.so
397
398If anything is found, then it is copied under `$APPDIR/lib/lib<name>.so`
399
400This mechanism ensures that the best machine code for the target
401device is automatically extracted from the package at installation
402time.
403