Home
last modified time | relevance | path

Searched refs:OpName (Results 1 – 25 of 31) sorted by relevance

12

/external/llvm/lib/Target/R600/
DR600InstrInfo.cpp76 NewMI->getOperand(getOperandIdx(*NewMI, AMDGPU::OpName::src0)) in copyPhysReg()
154 return isLDSInstr(Opcode) && getOperandIdx(Opcode, AMDGPU::OpName::dst) == -1; in isLDSNoRetInstr()
158 return isLDSInstr(Opcode) && getOperandIdx(Opcode, AMDGPU::OpName::dst) != -1; in isLDSRetInstr()
260 AMDGPU::OpName::src0, in getSrcIdx()
261 AMDGPU::OpName::src1, in getSrcIdx()
262 AMDGPU::OpName::src2 in getSrcIdx()
271 {AMDGPU::OpName::src0, AMDGPU::OpName::src0_sel}, in getSelIdx()
272 {AMDGPU::OpName::src1, AMDGPU::OpName::src1_sel}, in getSelIdx()
273 {AMDGPU::OpName::src2, AMDGPU::OpName::src2_sel}, in getSelIdx()
274 {AMDGPU::OpName::src0_X, AMDGPU::OpName::src0_sel_X}, in getSelIdx()
[all …]
DR600ExpandSpecialInstrs.cpp83 int DstIdx = TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::dst); in runOnMachineFunction()
90 AMDGPU::OpName::pred_sel); in runOnMachineFunction()
92 AMDGPU::OpName::pred_sel); in runOnMachineFunction()
112 TII->setImmOperand(PredSet, AMDGPU::OpName::update_exec_mask, 1); in runOnMachineFunction()
114 TII->setImmOperand(PredSet, AMDGPU::OpName::update_pred, 1); in runOnMachineFunction()
223 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0)) in runOnMachineFunction()
226 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1)) in runOnMachineFunction()
273 TII->getOperandIdx(MI, AMDGPU::OpName::dst)).getReg(); in runOnMachineFunction()
275 TII->getOperandIdx(MI, AMDGPU::OpName::src0)).getReg(); in runOnMachineFunction()
280 int Src1Idx = TII->getOperandIdx(MI, AMDGPU::OpName::src1); in runOnMachineFunction()
[all …]
DR600ClauseMergePass.cpp77 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::COUNT)).getImm(); in getCFAluSize()
83 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::Enabled)).getImm(); in isCFAluEnabled()
88 int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT); in cleanPotentialDisabledCFAlu()
107 int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT); in mergeIfPossible()
119 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE0); in mergeIfPossible()
121 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK0); in mergeIfPossible()
123 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR0); in mergeIfPossible()
135 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE1); in mergeIfPossible()
137 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK1); in mergeIfPossible()
139 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR1); in mergeIfPossible()
DSILoadStoreOptimizer.cpp175 int AddrIdx = AMDGPU::getNamedOperandIdx(I->getOpcode(), AMDGPU::OpName::addr); in findMatchingDSInst()
184 AMDGPU::OpName::offset); in findMatchingDSInst()
215 const MachineOperand *AddrReg = TII->getNamedOperand(*I, AMDGPU::OpName::addr); in mergeRead2Pair()
216 const MachineOperand *M0Reg = TII->getNamedOperand(*I, AMDGPU::OpName::m0); in mergeRead2Pair()
218 unsigned DestReg0 = TII->getNamedOperand(*I, AMDGPU::OpName::vdst)->getReg(); in mergeRead2Pair()
220 = TII->getNamedOperand(*Paired, AMDGPU::OpName::vdst)->getReg(); in mergeRead2Pair()
223 = TII->getNamedOperand(*I, AMDGPU::OpName::offset)->getImm() & 0xffff; in mergeRead2Pair()
225 = TII->getNamedOperand(*Paired, AMDGPU::OpName::offset)->getImm() & 0xffff; in mergeRead2Pair()
284 = TII->getNamedOperand(*Paired, AMDGPU::OpName::m0); in mergeRead2Pair()
302 const MachineOperand *Addr = TII->getNamedOperand(*I, AMDGPU::OpName::addr); in mergeWrite2Pair()
[all …]
DSIShrinkInstructions.cpp90 const MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2); in canShrink()
100 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in canShrink()
102 TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers); in canShrink()
109 if (TII->hasModifiersSet(MI, AMDGPU::OpName::src0_modifiers)) in canShrink()
113 if (TII->hasModifiersSet(MI, AMDGPU::OpName::omod)) in canShrink()
116 if (TII->hasModifiersSet(MI, AMDGPU::OpName::clamp)) in canShrink()
136 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0); in foldImmediates()
255 Inst32.addOperand(*TII->getNamedOperand(MI, AMDGPU::OpName::src0)); in runOnMachineFunction()
258 TII->getNamedOperand(MI, AMDGPU::OpName::src1); in runOnMachineFunction()
DR600Packetizer.cpp90 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::write); in getPreviousVector()
93 int DstIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::dst); in getPreviousVector()
135 AMDGPU::OpName::src0, in substitutePV()
136 AMDGPU::OpName::src1, in substitutePV()
137 AMDGPU::OpName::src2 in substitutePV()
193 int OpI = TII->getOperandIdx(MII->getOpcode(), AMDGPU::OpName::pred_sel), in isLegalToPacketizeTogether()
194 OpJ = TII->getOperandIdx(MIJ->getOpcode(), AMDGPU::OpName::pred_sel); in isLegalToPacketizeTogether()
230 unsigned LastOp = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::last); in setIsLastBit()
308 AMDGPU::OpName::bank_swizzle); in addToPacket()
312 AMDGPU::OpName::bank_swizzle); in addToPacket()
DSIInstrInfo.cpp52 static bool nodesHaveSameOperandValue(SDNode *N0, SDNode* N1, unsigned OpName) { in nodesHaveSameOperandValue() argument
56 int Op0Idx = AMDGPU::getNamedOperandIdx(Opc0, OpName); in nodesHaveSameOperandValue()
57 int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName); in nodesHaveSameOperandValue()
107 if (AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::data1) != -1 || in areLoadsFromSameBasePtr()
108 AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::data1) != -1) in areLoadsFromSameBasePtr()
144 if (!nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::soffset) || in areLoadsFromSameBasePtr()
146 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::vaddr) || in areLoadsFromSameBasePtr()
147 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::srsrc)) in areLoadsFromSameBasePtr()
150 int OffIdx0 = AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::offset); in areLoadsFromSameBasePtr()
151 int OffIdx1 = AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::offset); in areLoadsFromSameBasePtr()
[all …]
DR600ISelLowering.cpp207 int DstIdx = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst); in EmitInstrWithCustomInserter()
272 TII->setImmOperand(NewMI, AMDGPU::OpName::src0_sel, in EmitInstrWithCustomInserter()
2077 bool HasDst = TII->getOperandIdx(Opcode, AMDGPU::OpName::dst) > -1; in FoldOperand()
2088 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0), in FoldOperand()
2089 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1), in FoldOperand()
2090 TII->getOperandIdx(Opcode, AMDGPU::OpName::src2), in FoldOperand()
2091 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_X), in FoldOperand()
2092 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_Y), in FoldOperand()
2093 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_Z), in FoldOperand()
2094 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_W), in FoldOperand()
[all …]
DAMDGPUInstrInfo.cpp112 AMDGPU::OpName::addr); in expandPostRAPseudo()
117 AMDGPU::OpName::chan); in expandPostRAPseudo()
120 AMDGPU::OpName::dst); in expandPostRAPseudo()
134 AMDGPU::OpName::val); in expandPostRAPseudo()
DSIRegisterInfo.cpp299 TII->getNamedOperand(*MI, AMDGPU::OpName::src)->getReg(), in eliminateFrameIndex()
300 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_rsrc)->getReg(), in eliminateFrameIndex()
301 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_offset)->getReg(), in eliminateFrameIndex()
312 TII->getNamedOperand(*MI, AMDGPU::OpName::dst)->getReg(), in eliminateFrameIndex()
313 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_rsrc)->getReg(), in eliminateFrameIndex()
314 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_offset)->getReg(), in eliminateFrameIndex()
DSIInstrInfo.h235 unsigned OpName) const;
338 unsigned OpName) const { in getNamedOperand() argument
339 return getNamedOperand(const_cast<MachineInstr &>(MI), OpName); in getNamedOperand()
DSIInsertWaits.cpp200 MachineOperand *Data = TII->getNamedOperand(MI, AMDGPU::OpName::data); in isOpRelevant()
204 MachineOperand *Data0 = TII->getNamedOperand(MI, AMDGPU::OpName::data0); in isOpRelevant()
208 MachineOperand *Data1 = TII->getNamedOperand(MI, AMDGPU::OpName::data1); in isOpRelevant()
DR600Defines.h65 namespace OpName {
DR600MachineScheduler.cpp360 int DstIndex = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst); in AssignSlot()
DSIInstrInfo.td987 string OpName = opName;
1966 string OpName = NAME # suffix;
2397 let RowFields = ["OpName"];
2406 let RowFields = ["OpName"];
2466 let RowFields = ["OpName"];
/external/llvm/utils/TableGen/
DCodeGenInstruction.cpp161 std::string OpName = Op.substr(1); in ParseOperandName() local
165 std::string::size_type DotIdx = OpName.find_first_of("."); in ParseOperandName()
167 SubOpName = OpName.substr(DotIdx+1); in ParseOperandName()
170 OpName = OpName.substr(0, DotIdx); in ParseOperandName()
173 unsigned OpIdx = getOperandNamed(OpName); in ParseOperandName()
276 std::string OpName = P.first; in ProcessDisableEncoding() local
278 if (OpName.empty()) break; in ProcessDisableEncoding()
281 std::pair<unsigned,unsigned> Op = ParseOperandName(OpName, false); in ProcessDisableEncoding()
DCodeGenDAGPatterns.cpp2041 TreePatternNode *TreePattern::ParseTreePattern(Init *TheInit, StringRef OpName){ in ParseTreePattern() argument
2052 OpName); in ParseTreePattern()
2056 if (R->getName() == "node" && !OpName.empty()) { in ParseTreePattern()
2057 if (OpName.empty()) in ParseTreePattern()
2059 Args.push_back(OpName); in ParseTreePattern()
2062 Res->setName(OpName); in ParseTreePattern()
2068 if (OpName.empty()) in ParseTreePattern()
2071 Args.push_back(OpName); in ParseTreePattern()
2072 Res->setName(OpName); in ParseTreePattern()
2077 if (!OpName.empty()) in ParseTreePattern()
[all …]
DFastISelEmitter.cpp413 static std::string getLegalCName(std::string OpName) { in getLegalCName() argument
414 std::string::size_type pos = OpName.find("::"); in getLegalCName()
416 OpName.replace(pos, 2, "_"); in getLegalCName()
417 return OpName; in getLegalCName()
DAsmMatcherEmitter.cpp660 void buildInstructionOperandReference(MatchableInfo *II, StringRef OpName,
662 void buildAliasOperandReference(MatchableInfo *II, StringRef OpName,
1634 const std::string &OpName = OpInfo->Name; in buildAliasResultOperands() local
1647 TheDef->getName() + "' has operand '" + OpName + in buildAliasResultOperands()
DCodeGenDAGPatterns.h626 TreePatternNode *ParseTreePattern(Init *DI, StringRef OpName);
/external/clang/lib/AST/
DDeclarationName.cpp175 const char *OpName = OperatorNames[N.getCXXOverloadedOperator()]; in operator <<() local
176 assert(OpName && "not an overloaded operator"); in operator <<()
179 if (OpName[0] >= 'a' && OpName[0] <= 'z') in operator <<()
181 return OS << OpName; in operator <<()
/external/skia/src/animator/
DSkScriptDecompile.cpp16 static const struct OpName { struct
/external/antlr/antlr-3.4/runtime/Delphi/Sources/Antlr3.Runtime/
DAntlr.Runtime.pas6456 OpName: String;
6459 OpName := ClassName;
6460 DollarIndex := Pos('$',OpName) - 1; // Delphi strings are 1-based
6462 OpName := Copy(OpName,DollarIndex + 1,Length(OpName) - (DollarIndex + 1));
6463 Result := '<' + OpName + '@' + IntToStr(FIndex) + ':"' + FText.ToString + '">';
/external/clang/lib/Sema/
DSemaOverload.cpp6576 DeclarationName OpName = Context.DeclarationNames.getCXXOperatorName(Op); in AddMemberOperatorCandidates() local
6599 LookupResult Operators(*this, OpName, OpLoc, LookupOrdinaryName); in AddMemberOperatorCandidates()
10610 DeclarationName OpName = in DiagnoseTwoPhaseOperatorLookup() local
10612 LookupResult R(SemaRef, OpName, OpLoc, Sema::LookupOperatorName); in DiagnoseTwoPhaseOperatorLookup()
10906 DeclarationName OpName = Context.DeclarationNames.getCXXOperatorName(Op); in CreateOverloadedUnaryOp() local
10908 DeclarationNameInfo OpNameInfo(OpName, OpLoc); in CreateOverloadedUnaryOp()
10954 AddArgumentDependentLookupCandidates(OpName, OpLoc, ArgsArray, in CreateOverloadedUnaryOp()
11096 DeclarationName OpName = Context.DeclarationNames.getCXXOperatorName(Op); in CreateOverloadedBinOp() local
11118 DeclarationNameInfo OpNameInfo(OpName, OpLoc); in CreateOverloadedBinOp()
11166 AddArgumentDependentLookupCandidates(OpName, OpLoc, Args, in CreateOverloadedBinOp()
[all …]
/external/llvm/docs/
DWritingAnLLVMBackend.rst927 llvm::XXX:OpName namespace and also add an entry for it into the OperandMap
932 int DstIndex = SP::getNamedOperandIdx(SP::XNORrr, SP::OpName::dst); // => 0
933 int BIndex = SP::getNamedOperandIdx(SP::XNORrr, SP::OpName::b); // => 1
934 int CIndex = SP::getNamedOperandIdx(SP::XNORrr, SP::OpName::c); // => 2
935 int DIndex = SP::getNamedOperandIdx(SP::XNORrr, SP::OpName::d); // => -1
939 The entries in the OpName enum are taken verbatim from the TableGen definitions,
957 #define GET_INSTRINFO_OPERAND_ENUM // For OpName enum

12