| /external/llvm/lib/Target/X86/ |
| D | X86InstrSystem.td | 64 def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iret{w}", [], IIC_IRET>, OpSize16;
85 "in{w}\t{%dx, %ax|ax, dx}", [], IIC_IN_RR>, OpSize16;
95 "in{w}\t{$port, %ax|ax, $port}", [], IIC_IN_RI>, OpSize16;
105 "out{w}\t{%ax, %dx|dx, ax}", [], IIC_OUT_RR>, OpSize16;
115 "out{w}\t{%ax, $port|$port, ax}", [], IIC_OUT_IR>, OpSize16;
177 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>, OpSize16;
184 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>, OpSize16;
191 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>, OpSize16;
198 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>, OpSize16;
213 OpSize16;
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| D | X86InstrControl.td | 32 [], IIC_RET>, OpSize16;
43 [], IIC_RET_IMM>, OpSize16;
49 "{l}ret{w|f}", [], IIC_RET>, OpSize16;
55 "{l}ret{w|f}\t$amt", [], IIC_RET>, OpSize16;
64 "jmp\t$dst", [], IIC_JMP_REL>, OpSize16;
77 [], IIC_Jcc>, OpSize16, TB;
122 OpSize16, Sched<[WriteJump]>;
125 Requires<[Not64BitMode]>, OpSize16, Sched<[WriteJumpLd]>;
145 IIC_JMP_FAR_PTR>, OpSize16, Sched<[WriteJump]>;
156 "ljmp{w}\t{*}$dst", [], IIC_JMP_FAR_MEM>, OpSize16,
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| D | X86InstrShiftRotate.td | 25 [(set GR16:$dst, (shl GR16:$src1, CL))], IIC_SR>, OpSize16;
42 OpSize16;
60 "shl{w}\t$dst", [], IIC_SR>, OpSize16;
79 OpSize16;
95 IIC_SR>, OpSize16;
113 IIC_SR>, OpSize16;
131 [(set GR16:$dst, (srl GR16:$src1, CL))], IIC_SR>, OpSize16;
146 IIC_SR>, OpSize16;
161 [(set GR16:$dst, (srl GR16:$src1, (i8 1)))], IIC_SR>, OpSize16;
179 OpSize16;
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| D | X86InstrInfo.td | 963 "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16;
992 IIC_POP_REG16>, OpSize16;
996 IIC_POP_REG>, OpSize16;
998 IIC_POP_MEM>, OpSize16;
1007 IIC_PUSH_REG>, OpSize16;
1011 IIC_PUSH_REG>, OpSize16;
1013 IIC_PUSH_MEM>, OpSize16;
1020 "push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16,
1026 "push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16,
1037 OpSize16;
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| D | X86InstrExtension.td | 17 "{cbtw|cbw}", [], IIC_CBW>, OpSize16; // AX = signext(AL)
24 "{cwtd|cwd}", [], IIC_CBW>, OpSize16; // DX:AX = signext(AX)
45 TB, OpSize16, Sched<[WriteALU]>;
49 TB, OpSize16, Sched<[WriteALULd]>;
71 TB, OpSize16, Sched<[WriteALU]>;
75 TB, OpSize16, Sched<[WriteALULd]>;
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| D | X86InstrArithmetic.td | 21 "lea{w}\t{$src|$dst}, {$dst|$src}", [], IIC_LEA_16>, OpSize16;
71 [], IIC_MUL16_REG>, OpSize16, Sched<[WriteIMul]>;
98 [], IIC_MUL16_MEM>, OpSize16, SchedLoadReg<WriteIMulLd>;
118 IIC_IMUL16_RR>, OpSize16, Sched<[WriteIMul]>;
136 "imul{w}\t$src", [], IIC_IMUL16_MEM>, OpSize16,
161 TB, OpSize16;
183 TB, OpSize16;
212 IIC_IMUL16_RRI>, OpSize16;
218 IIC_IMUL16_RRI>, OpSize16;
253 OpSize16;
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| D | X86InstrTSX.td | 28 "xbegin\t$dst", []>, OpSize16, Requires<[HasRTM]>;
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| D | X86InstrCMovSetCC.td | 25 IIC_CMOV16_RR>, TB, OpSize16;
47 TB, OpSize16;
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| D | X86InstrCompiler.td | 349 [(X86rep_movs i16)], IIC_REP_MOVS>, REP, OpSize16,
361 [(X86rep_movs i16)], IIC_REP_MOVS>, REP, OpSize16,
379 [(X86rep_stos i16)], IIC_REP_STOS>, REP, OpSize16,
394 [(X86rep_stos i16)], IIC_REP_STOS>, REP, OpSize16,
563 [], IIC_ALU_NONMEM>, OpSize16, LOCK;
589 [], IIC_ALU_MEM>, OpSize16, LOCK;
610 [], IIC_ALU_MEM>, OpSize16, LOCK;
645 [], IIC_UNARY_MEM>, OpSize16, LOCK;
680 [(frag addr:$ptr, GR16:$swap, 2)], itin>, TB, OpSize16, LOCK;
727 itin>, OpSize16;
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| D | X86InstrFormats.td | 150 def OpSize16 : OperandSize<1>; // Needs 0x66 prefix in 32-bit mode.
164 class OpSize16 { OperandSize OpSize = OpSize16; }
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| D | X86InstrSSE.td | 6731 OpSize16, XS;
6736 Sched<[WriteFAddLd]>, OpSize16, XS;
7532 int_x86_sse42_crc32_32_16>, OpSize16;
7534 int_x86_sse42_crc32_32_16>, OpSize16;
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| /external/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.cpp | 131 OpSize16 = 1, OpSize32 = 2 enumerator
420 if (HasREX_WPrefix && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)) in insnContext()
424 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
426 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
428 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32) in insnContext()
430 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
447 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
449 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
451 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16) in insnContext()
453 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 334 OpSize16 = 1 << OpSizeShift, enumerator
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| D | X86MCCodeEmitter.cpp | 1109 : X86II::OpSize16)) in EmitOpcodePrefix()
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