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Searched refs:OpSize32 (Results 1 – 14 of 14) sorted by relevance

/external/llvm/lib/Target/X86/
DX86InstrSystem.td66 OpSize32;
88 "in{l}\t{%dx, %eax|eax, dx}", [], IIC_IN_RR>, OpSize32;
98 "in{l}\t{$port, %eax|eax, $port}", [], IIC_IN_RI>, OpSize32;
108 "out{l}\t{%eax, %dx|dx, eax}", [], IIC_OUT_RR>, OpSize32;
118 "out{l}\t{%eax, $port|$port, eax}", [], IIC_OUT_IR>, OpSize32;
179 "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>, OpSize32;
186 "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>, OpSize32;
193 "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>, OpSize32;
200 "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>, OpSize32;
221 OpSize32;
[all …]
DX86InstrControl.td25 "ret{l}", [(X86retflag 0)], IIC_RET>, OpSize32,
28 "ret{q}", [(X86retflag 0)], IIC_RET>, OpSize32,
35 [(X86retflag timm:$amt)], IIC_RET_IMM>, OpSize32,
39 [(X86retflag timm:$amt)], IIC_RET_IMM>, OpSize32,
45 "{l}ret{l|f}", [], IIC_RET>, OpSize32;
51 "{l}ret{l|f}\t$amt", [], IIC_RET>, OpSize32;
66 "jmp\t$dst", [], IIC_JMP_REL>, OpSize32;
79 [], IIC_Jcc>, TB, OpSize32;
129 OpSize32, Sched<[WriteJump]>;
132 Requires<[Not64BitMode]>, OpSize32, Sched<[WriteJumpLd]>;
[all …]
DX86InstrShiftRotate.td28 [(set GR32:$dst, (shl GR32:$src1, CL))], IIC_SR>, OpSize32;
46 OpSize32;
62 "shl{l}\t$dst", [], IIC_SR>, OpSize32;
83 OpSize32;
99 IIC_SR>, OpSize32;
117 IIC_SR>, OpSize32;
134 [(set GR32:$dst, (srl GR32:$src1, CL))], IIC_SR>, OpSize32;
150 IIC_SR>, OpSize32;
164 [(set GR32:$dst, (srl GR32:$src1, (i8 1)))], IIC_SR>, OpSize32;
183 OpSize32;
[all …]
DX86InstrExtension.td20 "{cwtl|cwde}", [], IIC_CBW>, OpSize32; // EAX = signext(AX)
27 "{cltd|cdq}", [], IIC_CBW>, OpSize32; // EDX:EAX = signext(EAX)
54 OpSize32, Sched<[WriteALU]>;
58 OpSize32, Sched<[WriteALULd]>;
62 OpSize32, Sched<[WriteALU]>;
66 OpSize32, TB, Sched<[WriteALULd]>;
80 OpSize32, Sched<[WriteALU]>;
84 OpSize32, Sched<[WriteALULd]>;
88 OpSize32, Sched<[WriteALU]>;
92 TB, OpSize32, Sched<[WriteALULd]>;
DX86InstrInfo.td965 "nop{l}\t$zero", [], IIC_NOP>, TB, OpSize32;
994 IIC_POP_REG>, OpSize32, Requires<[Not64BitMode]>;
1000 IIC_POP_REG>, OpSize32, Requires<[Not64BitMode]>;
1002 IIC_POP_MEM>, OpSize32, Requires<[Not64BitMode]>;
1009 IIC_PUSH_REG>, OpSize32, Requires<[Not64BitMode]>;
1015 IIC_PUSH_REG>, OpSize32, Requires<[Not64BitMode]>;
1017 IIC_PUSH_MEM>, OpSize32, Requires<[Not64BitMode]>;
1023 "push{l}\t$imm", [], IIC_PUSH_IMM>, OpSize32,
1029 "push{l}\t$imm", [], IIC_PUSH_IMM>, OpSize32,
1039 OpSize32, Requires<[Not64BitMode]>;
[all …]
DX86InstrArithmetic.td27 OpSize32, Requires<[Not64BitMode]>;
33 OpSize32, Requires<[In64BitMode]>;
77 IIC_MUL32_REG>, OpSize32, Sched<[WriteIMul]>;
103 [], IIC_MUL32_MEM>, OpSize32, SchedLoadReg<WriteIMulLd>;
122 IIC_IMUL32_RR>, OpSize32, Sched<[WriteIMul]>;
141 "imul{l}\t$src", [], IIC_IMUL32_MEM>, OpSize32,
166 TB, OpSize32;
190 TB, OpSize32;
224 IIC_IMUL32_RRI>, OpSize32;
230 IIC_IMUL32_RRI>, OpSize32;
[all …]
DX86InstrTSX.td30 "xbegin\t$dst", []>, OpSize32, Requires<[HasRTM]>;
DX86InstrCMovSetCC.td31 IIC_CMOV32_RR>, TB, OpSize32;
53 TB, OpSize32;
DX86InstrCompiler.td352 [(X86rep_movs i32)], IIC_REP_MOVS>, REP, OpSize32,
364 [(X86rep_movs i32)], IIC_REP_MOVS>, REP, OpSize32,
383 [(X86rep_stos i32)], IIC_REP_STOS>, REP, OpSize32,
398 [(X86rep_stos i32)], IIC_REP_STOS>, REP, OpSize32,
569 [], IIC_ALU_NONMEM>, OpSize32, LOCK;
596 [], IIC_ALU_MEM>, OpSize32, LOCK;
616 [], IIC_ALU_MEM>, OpSize32, LOCK;
648 [], IIC_UNARY_MEM>, OpSize32, LOCK;
684 [(frag addr:$ptr, GR32:$swap, 4)], itin>, TB, OpSize32, LOCK;
734 itin>, OpSize32;
DX86InstrFormats.td151 def OpSize32 : OperandSize<2>; // Needs 0x66 prefix in 16-bit mode.
165 class OpSize32 { OperandSize OpSize = OpSize32; }
DX86InstrSSE.td6742 OpSize32, XS;
6748 Sched<[WriteFAddLd]>, OpSize32, XS;
7536 int_x86_sse42_crc32_32_32>, OpSize32;
7538 int_x86_sse42_crc32_32_32>, OpSize32;
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h335 OpSize32 = 2 << OpSizeShift, enumerator
DX86MCCodeEmitter.cpp1108 if ((TSFlags & X86II::OpSizeMask) == (is16BitMode(STI) ? X86II::OpSize32 in EmitOpcodePrefix()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp131 OpSize16 = 1, OpSize32 = 2 enumerator
926 } else if(OpSize == X86Local::OpSize32) { in typeFromString()