| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_atom_scissor.c | 46 struct pipe_scissor_state scissor; in update_scissor() local
51 scissor.minx = 0; in update_scissor()
52 scissor.miny = 0; in update_scissor()
53 scissor.maxx = fb->Width; in update_scissor()
54 scissor.maxy = fb->Height; in update_scissor()
61 if (ctx->Scissor.X > (GLint)scissor.minx) in update_scissor()
62 scissor.minx = ctx->Scissor.X; in update_scissor()
63 if (ctx->Scissor.Y > (GLint)scissor.miny) in update_scissor()
64 scissor.miny = ctx->Scissor.Y; in update_scissor()
66 if (xmax < (GLint) scissor.maxx) in update_scissor()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | gen6_scissor_state.c | 40 struct gen6_scissor_rect *scissor; in gen6_upload_scissor_state() local
43 scissor = brw_state_batch(brw, AUB_TRACE_SCISSOR_STATE, in gen6_upload_scissor_state()
44 sizeof(*scissor), 32, &scissor_state_offset); in gen6_upload_scissor_state()
63 scissor->xmin = 1; in gen6_upload_scissor_state()
64 scissor->xmax = 0; in gen6_upload_scissor_state()
65 scissor->ymin = 1; in gen6_upload_scissor_state()
66 scissor->ymax = 0; in gen6_upload_scissor_state()
69 scissor->xmin = ctx->DrawBuffer->_Xmin; in gen6_upload_scissor_state()
70 scissor->xmax = ctx->DrawBuffer->_Xmax - 1; in gen6_upload_scissor_state()
71 scissor->ymin = ctx->DrawBuffer->_Ymin; in gen6_upload_scissor_state()
[all …]
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| D | brw_sf_state.c | 94 sfv->scissor.xmin = 1; in upload_sf_vp()
95 sfv->scissor.xmax = 0; in upload_sf_vp()
96 sfv->scissor.ymin = 1; in upload_sf_vp()
97 sfv->scissor.ymax = 0; in upload_sf_vp()
100 sfv->scissor.xmin = ctx->DrawBuffer->_Xmin; in upload_sf_vp()
101 sfv->scissor.xmax = ctx->DrawBuffer->_Xmax - 1; in upload_sf_vp()
102 sfv->scissor.ymin = ctx->DrawBuffer->_Ymin; in upload_sf_vp()
103 sfv->scissor.ymax = ctx->DrawBuffer->_Ymax - 1; in upload_sf_vp()
107 sfv->scissor.xmin = ctx->DrawBuffer->_Xmin; in upload_sf_vp()
108 sfv->scissor.xmax = ctx->DrawBuffer->_Xmax - 1; in upload_sf_vp()
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| D | brw_state_dump.c | 315 vp->scissor.xmin, vp->scissor.ymin); in dump_sf_viewport_state()
317 vp->scissor.xmax, vp->scissor.ymax); in dump_sf_viewport_state()
432 struct gen6_scissor_rect *scissor = intel->batch.bo->virtual + offset; in dump_scissor() local
435 scissor->xmin, scissor->ymin); in dump_scissor()
437 scissor->xmax, scissor->ymax); in dump_scissor()
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| /external/deqp/modules/gles3/functional/ |
| D | es3fRasterizerDiscardTests.cpp | 435 …tcu::TestCaseGroup* scissor = new tcu::TestCaseGroup(m_testCtx, "scissor", "Rasterizer discard tes… in init() local
439 addChild(scissor); in init()
466 …scissor->addChild(new RasterizerDiscardCase(m_context, "write_depth_points", "points", 4, CASE… in init()
467 …scissor->addChild(new RasterizerDiscardCase(m_context, "write_depth_lines", "lines", 4, CASE_… in init()
468 …scissor->addChild(new RasterizerDiscardCase(m_context, "write_depth_line_strip", "line_strip", 4… in init()
469 …scissor->addChild(new RasterizerDiscardCase(m_context, "write_depth_line_loop", "line_loop", 4,… in init()
470 …scissor->addChild(new RasterizerDiscardCase(m_context, "write_depth_triangles", "triangles", 4,… in init()
471 …scissor->addChild(new RasterizerDiscardCase(m_context, "write_depth_triangle_strip", "triangle_str… in init()
472 …scissor->addChild(new RasterizerDiscardCase(m_context, "write_depth_triangle_fan", "triangle_fan"… in init()
474 …scissor->addChild(new RasterizerDiscardCase(m_context, "write_stencil_points", "points", 4, CA… in init()
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| D | es3fDepthStencilClearTests.cpp | 73 , scissor (0, 0, 0, 0) in Clear()
84 tcu::IVec4 scissor; member
121 …ar* description, int numIters, int numClears, bool depth, bool stencil, bool scissor, bool masked);
145 …har* description, int numIters, int numClears, bool depth, bool stencil, bool scissor, bool masked) in DepthStencilClearCase() argument
149 , m_testScissor (scissor) in DepthStencilClearCase()
249 clear->scissor = tcu::IVec4(x, y, w, h); in generateClears()
299 gl.scissor(clear->scissor.x(), clear->scissor.y(), clear->scissor.z(), clear->scissor.w()); in renderGL()
427 …tcu::IVec4 clearRect = clear->useScissor ? clear->scissor : tcu::IVec4(0, 0, dst.getWidth(), dst.g… in renderReference()
471 …tcu::IVec4 clearRect = clear->useScissor ? clear->scissor : tcu::IVec4(0, 0, dst.getWidth(), dst.g… in renderReference()
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| D | es3fScissorTests.cpp | 70 const tcu::Vec4 scissor; in init() member
98 cases[caseNdx].scissor, in init()
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| /external/deqp/doc/testspecs/GLES2/ |
| D | functional.scissors.txt | 22 + dEQP-GLES2.functional.scissor.*
23 + dEQP-GLES3.functional.scissor.*
45 This test set compares images rendered by the target with the scissor test
46 enabled to references generated with the scissor test disabled but with
47 areas outside the scissor rectangle cleared by the test logic.
49 All primitive types are tested in all reasonable scissor configurations
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| /external/deqp/modules/gles2/functional/ |
| D | es2fDepthStencilClearTests.cpp | 73 , scissor (0, 0, 0, 0) in Clear()
84 tcu::IVec4 scissor; member
121 …ar* description, int numIters, int numClears, bool depth, bool stencil, bool scissor, bool masked);
145 …har* description, int numIters, int numClears, bool depth, bool stencil, bool scissor, bool masked) in DepthStencilClearCase() argument
149 , m_testScissor (scissor) in DepthStencilClearCase()
246 clear->scissor = tcu::IVec4(x, y, w, h); in generateClears()
296 gl.scissor(clear->scissor.x(), clear->scissor.y(), clear->scissor.z(), clear->scissor.w()); in renderGL()
424 …tcu::IVec4 clearRect = clear->useScissor ? clear->scissor : tcu::IVec4(0, 0, dst.getWidth(), dst.g… in renderReference()
468 …tcu::IVec4 clearRect = clear->useScissor ? clear->scissor : tcu::IVec4(0, 0, dst.getWidth(), dst.g… in renderReference()
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| D | es2fScissorTests.cpp | 60 const tcu::Vec4 scissor; in init() member
88 cases[caseNdx].scissor, in init()
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| /external/mesa3d/src/gallium/drivers/softpipe/ |
| D | sp_state_clip.c | 62 const struct pipe_scissor_state *scissor) in softpipe_set_scissor_state() argument
68 softpipe->scissor = *scissor; /* struct copy */ in softpipe_set_scissor_state()
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| D | sp_state_derived.c | 186 if (sp->rasterizer->scissor) { in compute_cliprect()
192 sp->cliprect.minx = MAX2(sp->scissor.minx, 0); in compute_cliprect()
193 sp->cliprect.miny = MAX2(sp->scissor.miny, 0); in compute_cliprect()
194 sp->cliprect.maxx = MIN2(sp->scissor.maxx, surfWidth); in compute_cliprect()
195 sp->cliprect.maxy = MIN2(sp->scissor.maxy, surfHeight); in compute_cliprect()
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| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| D | lp_state_clip.c | 62 const struct pipe_scissor_state *scissor) in llvmpipe_set_scissor_state() argument
68 llvmpipe->scissor = *scissor; /* struct copy */ in llvmpipe_set_scissor_state()
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| D | lp_setup.c | 484 boolean scissor, in lp_setup_set_triangle_state() argument
494 if (setup->scissor_test != scissor) { in lp_setup_set_triangle_state()
496 setup->scissor_test = scissor; in lp_setup_set_triangle_state()
600 const struct pipe_scissor_state *scissor ) in lp_setup_set_scissor() argument
604 assert(scissor); in lp_setup_set_scissor()
606 setup->scissor.x0 = scissor->minx; in lp_setup_set_scissor()
607 setup->scissor.x1 = scissor->maxx-1; in lp_setup_set_scissor()
608 setup->scissor.y0 = scissor->miny; in lp_setup_set_scissor()
609 setup->scissor.y1 = scissor->maxy-1; in lp_setup_set_scissor()
887 u_rect_possible_intersection(&setup->scissor, in try_update_scene_state()
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| D | lp_setup.h | 79 boolean scissor,
120 const struct pipe_scissor_state *scissor );
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| D | lp_setup_line.c | 686 const struct u_rect *scissor = &setup->scissor; in try_setup_line() local
690 plane[4].c = 1-scissor->x0; in try_setup_line()
695 plane[5].c = scissor->x1+1; in try_setup_line()
700 plane[6].c = 1-scissor->y0; in try_setup_line()
705 plane[7].c = scissor->y1+1; in try_setup_line()
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_state_framebuffer.c | 464 const struct pipe_scissor_state *scissor = &svga->curr.scissor; in emit_scissor_rect() local
467 rect.x = scissor->minx; in emit_scissor_rect()
468 rect.y = scissor->miny; in emit_scissor_rect()
469 rect.w = scissor->maxx - scissor->minx; /* + 1 ?? */ in emit_scissor_rect()
470 rect.h = scissor->maxy - scissor->miny; /* + 1 ?? */ in emit_scissor_rect()
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| D | svga_pipe_misc.c | 35 const struct pipe_scissor_state *scissor ) in svga_set_scissor_state() argument
39 memcpy( &svga->curr.scissor, scissor, sizeof(*scissor) ); in svga_set_scissor_state()
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_state_dynamic.c | 269 unsigned x1 = i915->scissor.minx; in upload_SCISSOR_RECT()
270 unsigned y1 = i915->scissor.miny; in upload_SCISSOR_RECT()
271 unsigned x2 = i915->scissor.maxx - 1; in upload_SCISSOR_RECT()
272 unsigned y2 = i915->scissor.maxy - 1; in upload_SCISSOR_RECT()
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| /external/mesa3d/src/gallium/auxiliary/vl/ |
| D | vl_compositor.c | 449 rast.scissor = 1; in init_pipe_state()
648 result.x0 = MAX2(result.x0, s->scissor.minx); in calc_drawn_area()
649 result.y0 = MAX2(result.y0, s->scissor.miny); in calc_drawn_area()
650 result.x1 = MIN2(result.x1, s->scissor.maxx); in calc_drawn_area()
651 result.y1 = MIN2(result.y1, s->scissor.maxy); in calc_drawn_area()
830 s->scissor.minx = dst_clip->x0; in vl_compositor_set_dst_clip()
831 s->scissor.miny = dst_clip->y0; in vl_compositor_set_dst_clip()
832 s->scissor.maxx = dst_clip->x1; in vl_compositor_set_dst_clip()
833 s->scissor.maxy = dst_clip->y1; in vl_compositor_set_dst_clip()
996 s->scissor.minx = 0; in vl_compositor_render()
[all …]
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| /external/mesa3d/src/gallium/auxiliary/draw/ |
| D | draw_context.c | 704 boolean scissor, in draw_get_rasterizer_no_cull() argument
707 if (!draw->rasterizer_no_cull[scissor][flatshade]) { in draw_get_rasterizer_no_cull()
713 rast.scissor = scissor; in draw_get_rasterizer_no_cull()
718 draw->rasterizer_no_cull[scissor][flatshade] = in draw_get_rasterizer_no_cull()
721 return draw->rasterizer_no_cull[scissor][flatshade]; in draw_get_rasterizer_no_cull()
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| /external/mesa3d/src/gallium/drivers/nv50/ |
| D | nv50_state_validate.c | 140 struct pipe_scissor_state *s = &nv50->scissor; in nv50_validate_scissor()
147 nv50->state.scissor == nv50->rast->pipe.scissor) in nv50_validate_scissor()
149 nv50->state.scissor = nv50->rast->pipe.scissor; in nv50_validate_scissor()
151 if (nv50->state.scissor) { in nv50_validate_scissor()
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_ioctl.c | 102 if (rmesa->radeon.state.scissor.enabled) { in radeonEmitScissor()
107 OUT_BATCH((rmesa->radeon.state.scissor.rect.y1 << 16) | in radeonEmitScissor()
108 rmesa->radeon.state.scissor.rect.x1); in radeonEmitScissor()
110 OUT_BATCH(((rmesa->radeon.state.scissor.rect.y2) << 16) | in radeonEmitScissor()
111 (rmesa->radeon.state.scissor.rect.x2)); in radeonEmitScissor()
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| /external/mesa3d/src/mesa/main/ |
| D | descrip.mms | 75 scissor.c \
149 scissor.obj,\
251 scissor.obj : scissor.c
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| /external/deqp/doc/testspecs/GLES3/ |
| D | functional.rasterizer_discard.txt | 32 - Discard test for default framebuffer with scissor test enabled
51 framebuffer discards are tested with scissor test enabled.
|